Searched refs:WideVecVT (Results 1 – 3 of 3) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 16434 EVT WideVecVT = in LowerExtendedLoad() local
16438 assert(WideVecVT.getSizeInBits() == LoadUnitVecVT.getSizeInBits() && in LowerExtendedLoad()
16442 assert(TLI.isTypeLegal(WideVecVT) && in LowerExtendedLoad()
16473 SDValue SlicedVec = DAG.getBitcast(WideVecVT, Res); in LowerExtendedLoad()
16499 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, dl, SlicedVec, in LowerExtendedLoad()
16500 DAG.getUNDEF(WideVecVT), ShuffleVec); in LowerExtendedLoad()
28995 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), in combineMaskedLoad() local
28997 assert(WideVecVT.getSizeInBits() == VT.getSizeInBits()); in combineMaskedLoad()
29000 SDValue WideSrc0 = DAG.getBitcast(WideVecVT, Mld->getSrc0()); in combineMaskedLoad()
29007 assert(DAG.getTargetLoweringInfo().isTypeLegal(WideVecVT) && in combineMaskedLoad()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 13575 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), MemVT.getScalarType(), in PerformLOADCombine() local
13578 if (!TLI.isTypeLegal(WideVecVT)) return SDValue(); in PerformLOADCombine()
13592 SDValue SlicedVec = DAG.getNode(ISD::BITCAST, dl, WideVecVT, ScalarInVector); in PerformLOADCombine()
13599 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, dl, SlicedVec, in PerformLOADCombine()
13669 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), in PerformSTORECombine() local
13672 assert(WideVecVT.getSizeInBits() == VT.getSizeInBits()); in PerformSTORECombine()
13674 SDValue WideVec = DAG.getNode(ISD::BITCAST, dl, WideVecVT, St->getValue()); in PerformSTORECombine()
13679 if (!TLI.isTypeLegal(WideVecVT)) return SDValue(); in PerformSTORECombine()
13681 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, dl, WideVec, in PerformSTORECombine()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 10266 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), StVT.getScalarType(), in PerformSTORECombine() local
10268 assert(WideVecVT.getSizeInBits() == VT.getSizeInBits()); in PerformSTORECombine()
10271 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformSTORECombine()
10279 if (!TLI.isTypeLegal(WideVecVT)) return SDValue(); in PerformSTORECombine()
10281 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, DL, WideVec, in PerformSTORECombine()
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