Searched refs:X0010 (Results 1 – 2 of 2) sorted by relevance
| /external/valgrind/VEX/priv/ |
| D | host_arm_defs.c | 2824 #define X0010 BITS4(0,0,1,0) macro
3094 case ARMalu_SUB: subopc = X0010; break; in emit_ARMInstr()
3120 case ARMsh_SAR: subopc = X0010; break; in emit_ARMInstr()
3503 instr = XXX___XX(i->ARMin.Call.cond, X0001, X0010, /*___*/ in emit_ARMInstr()
3533 instr = XXX___XX(ARMcc_AL, X0001, X0010, /*___*/ in emit_ARMInstr()
4222 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regM, regD, X0001, in emit_ARMInstr()
4227 regD, X0010, BITS4(0,0,M,0), regM); in emit_ARMInstr()
4231 regD, X0010, BITS4(1,0,M,0), regM); in emit_ARMInstr()
4235 regD, X0010, BITS4(0,1,M,0), regM); in emit_ARMInstr()
4239 regD, X0010, BITS4(1,1,M,0), regM); in emit_ARMInstr()
[all …]
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| D | host_arm64_defs.c | 2673 #define X0010 BITS4(0,0,1,0) macro
4194 case ARM64fpb_ADD: b1512 = X0010; break; in emit_ARM64Instr()
4217 case ARM64fpb_ADD: b1512 = X0010; break; in emit_ARM64Instr()
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