| /external/llvm/lib/Target/X86/ |
| D | X86Subtarget.cpp | 49 unsigned char X86Subtarget::classifyBlockAddressReference() const { in classifyBlockAddressReference()
56 X86Subtarget::classifyGlobalReference(const GlobalValue *GV) const { in classifyGlobalReference()
61 X86Subtarget::classifyLocalReference(const GlobalValue *GV) const { in classifyLocalReference()
89 unsigned char X86Subtarget::classifyGlobalReference(const GlobalValue *GV, in classifyGlobalReference()
114 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV) const { in classifyGlobalFunctionReference()
119 X86Subtarget::classifyGlobalFunctionReference(const GlobalValue *GV, in classifyGlobalFunctionReference()
146 const char *X86Subtarget::getBZeroEntry() const { in getBZeroEntry()
155 bool X86Subtarget::hasSinCos() const { in hasSinCos()
162 bool X86Subtarget::isLegalToCallImmediateAddr() const { in isLegalToCallImmediateAddr()
171 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { in initSubtargetFeatures()
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| D | X86TargetMachine.h | 27 X86Subtarget Subtarget;
29 mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;
37 const X86Subtarget *getSubtargetImpl(const Function &F) const override;
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| D | X86RegisterInfo.cpp | 159 const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>(); in getPointerRegClass()
244 const X86Subtarget &Subtarget = MF->getSubtarget<X86Subtarget>(); in getCalleeSavedRegs()
343 const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>(); in getCallPreservedMask()
499 if (!Is64Bit || !MF.getSubtarget<X86Subtarget>().hasAVX512()) { in getReservedRegs()
664 const X86Subtarget &Subtarget = MF.getSubtarget<X86Subtarget>(); in getPtrSizedFrameRegister()
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| D | X86FrameLowering.h | 23 class X86Subtarget; variable
28 X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride);
32 const X86Subtarget &STI;
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| D | X86SelectionDAGInfo.cpp | 52 const X86Subtarget &Subtarget = in EmitTargetCodeForMemset()
53 DAG.getMachineFunction().getSubtarget<X86Subtarget>(); in EmitTargetCodeForMemset()
203 const X86Subtarget &Subtarget = in EmitTargetCodeForMemcpy()
204 DAG.getMachineFunction().getSubtarget<X86Subtarget>(); in EmitTargetCodeForMemcpy()
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| D | X86AsmPrinter.h | 29 const X86Subtarget *Subtarget;
131 const X86Subtarget &getSubtarget() const { return *Subtarget; } in getSubtarget()
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| D | X86FixupSetCC.cpp | 122 TII = MF.getSubtarget<X86Subtarget>().getInstrInfo(); in runOnMachineFunction()
160 const TargetRegisterClass *RC = MF.getSubtarget<X86Subtarget>().is64Bit() in runOnMachineFunction()
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| D | X86PadShortFunction.cpp | 87 const X86Subtarget *STI;
108 STI = &MF.getSubtarget<X86Subtarget>(); in runOnMachineFunction()
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| D | X86TargetTransformInfo.h | 33 const X86Subtarget *ST;
38 const X86Subtarget *getST() const { return ST; } in getST()
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| D | X86Subtarget.h | 45 class X86Subtarget final : public X86GenSubtargetInfo {
315 X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
348 X86Subtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
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| D | X86SelectionDAGInfo.h | 24 class X86Subtarget; variable
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| D | X86VZeroUpper.cpp | 259 const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>(); in runOnMachineFunction()
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| D | X86InstrInfo.h | 28 class X86Subtarget; variable
142 X86Subtarget &Subtarget;
176 explicit X86InstrInfo(X86Subtarget &STI);
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| D | X86FixupLEAs.cpp | 169 const X86Subtarget &ST = Func.getSubtarget<X86Subtarget>(); in runOnMachineFunction()
411 if (MF.getSubtarget<X86Subtarget>().isSLM()) in processBasicBlock()
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| D | X86TargetMachine.cpp | 180 const X86Subtarget *
217 I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this, in getSubtargetImpl()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86Subtarget.cpp | 39 unsigned char X86Subtarget::
54 unsigned char X86Subtarget::
150 const char *X86Subtarget::getBZeroEntry() const { in getBZeroEntry()
161 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const { in IsLegalToCallImmediateAddr()
171 unsigned X86Subtarget::getSpecialAddressLatency() const { in getSpecialAddressLatency()
178 void X86Subtarget::AutoDetectSubtargetFeatures() { in AutoDetectSubtargetFeatures()
273 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, in X86Subtarget() function in X86Subtarget
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| D | X86AsmPrinter.h | 35 const X86Subtarget *Subtarget;
39 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86AsmPrinter()
46 const X86Subtarget &getSubtarget() const { return *Subtarget; } in getSubtarget()
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| D | X86SelectionDAGInfo.h | 23 class X86Subtarget; variable
28 const X86Subtarget *Subtarget;
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| D | X86JITInfo.h | 23 class X86Subtarget; variable
27 const X86Subtarget *Subtarget;
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| D | X86FrameLowering.h | 27 const X86Subtarget &STI;
29 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti) in X86FrameLowering()
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| D | X86TargetMachine.h | 35 X86Subtarget Subtarget;
54 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } in getSubtargetImpl()
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| D | X86GenCallingConv.inc | 75 if (State.getTarget().getSubtarget<X86Subtarget>().is64Bit()) {
174 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) {
243 if (State.getTarget().getSubtarget<X86Subtarget>().hasAVX()) {
327 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) {
465 if (State.getTarget().getSubtarget<X86Subtarget>().isTargetWin64()) {
525 if (State.getTarget().getSubtarget<X86Subtarget>().isTargetDarwin()) {
526 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) {
546 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMM()) {
563 if (State.getTarget().getSubtarget<X86Subtarget>().hasAVX()) {
651 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMM()) {
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| D | X86Subtarget.h | 42 class X86Subtarget : public X86GenSubtargetInfo {
145 X86Subtarget(const std::string &TT, const std::string &CPU,
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| D | X86RegisterInfo.cpp | 55 : X86GenRegisterInfo(tm.getSubtarget<X86Subtarget>().is64Bit() in X86RegisterInfo()
63 const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86RegisterInfo()
290 if (TM.getSubtarget<X86Subtarget>().is64Bit()) in getPointerRegClass()
294 if (TM.getSubtarget<X86Subtarget>().is64Bit()) in getPointerRegClass()
298 if (TM.getSubtarget<X86Subtarget>().isTargetWin64()) in getPointerRegClass()
300 if (TM.getSubtarget<X86Subtarget>().is64Bit()) in getPointerRegClass()
331 return TM.getSubtarget<X86Subtarget>().is64Bit() ? 10 : 4; in getRegPressureLimit()
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| D | X86ISelLowering.h | 437 bool isMOVSHDUPMask(ShuffleVectorSDNode *N, const X86Subtarget *Subtarget);
441 bool isMOVSLDUPMask(ShuffleVectorSDNode *N, const X86Subtarget *Subtarget);
696 const X86Subtarget* getSubtarget() const { in getSubtarget()
727 const X86Subtarget *Subtarget;
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