Searched refs:_abs (Results 1 – 3 of 3) sorted by relevance
| /external/llvm/test/Transforms/InstSimplify/ |
| D | call-callconv.ll | 6 define arm_aapcscc i32 @_abs(i32 %i) nounwind readnone {
7 ; CHECK: _abs
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_disasm.c | 99 static const char *const _abs[2] = { variable
848 err |= control(file, "abs", _abs, __abs, NULL); in src_da1()
879 err |= control(file, "abs", _abs, __abs, NULL); in src_ia1()
934 err |= control(file, "abs", _abs, __abs, NULL); in src_da16()
959 err |= control(file, "abs", _abs, brw_inst_3src_src0_abs(devinfo, inst), NULL); in src0_3src()
986 err |= control(file, "abs", _abs, brw_inst_3src_src1_abs(devinfo, inst), NULL); in src1_3src()
1014 err |= control(file, "abs", _abs, brw_inst_3src_src2_abs(devinfo, inst), NULL); in src2_3src()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoV4.td | 3424 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3526 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3575 let BaseOpcode = BaseOp#_abs;
3584 let BaseOpcode = BaseOp#_abs in {
3727 def _abs : T_LoadAbs_Pred <mnemonic, RC, MajOp, PredNot, 0>;
3735 let CextOpcode = CextOp, BaseOpcode = CextOp#_abs in {
3737 def L4_#NAME#_abs: T_LoadAbs <mnemonic, RC, ImmOp, MajOp>;
3772 let BaseOpcode = BaseOp#_abs;
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