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Searched refs:_mm256_add_epi32 (Results 1 – 10 of 10) sorted by relevance

/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_dct32x32_impl_avx2.h383 _mm256_add_epi32(s2_20_2, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
385 _mm256_add_epi32(s2_20_3, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
387 _mm256_add_epi32(s2_21_2, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
389 _mm256_add_epi32(s2_21_3, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
391 _mm256_add_epi32(s2_22_2, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
393 _mm256_add_epi32(s2_22_3, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
395 _mm256_add_epi32(s2_23_2, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
397 _mm256_add_epi32(s2_23_3, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
399 _mm256_add_epi32(s2_24_2, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
401 _mm256_add_epi32(s2_24_3, k__DCT_CONST_ROUNDING); in FDCT32x32_2D_AVX2()
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Dsad4d_avx2.c44 sum_ref0 = _mm256_add_epi32(sum_ref0, ref0_reg); in vpx_sad32x32x4d_avx2()
45 sum_ref1 = _mm256_add_epi32(sum_ref1, ref1_reg); in vpx_sad32x32x4d_avx2()
46 sum_ref2 = _mm256_add_epi32(sum_ref2, ref2_reg); in vpx_sad32x32x4d_avx2()
47 sum_ref3 = _mm256_add_epi32(sum_ref3, ref3_reg); in vpx_sad32x32x4d_avx2()
72 sum_mlow = _mm256_add_epi32(sum_mlow, sum_mhigh); in vpx_sad32x32x4d_avx2()
124 sum_ref0 = _mm256_add_epi32(sum_ref0, ref0_reg); in vpx_sad64x64x4d_avx2()
125 sum_ref1 = _mm256_add_epi32(sum_ref1, ref1_reg); in vpx_sad64x64x4d_avx2()
126 sum_ref2 = _mm256_add_epi32(sum_ref2, ref2_reg); in vpx_sad64x64x4d_avx2()
127 sum_ref3 = _mm256_add_epi32(sum_ref3, ref3_reg); in vpx_sad64x64x4d_avx2()
128 sum_ref0 = _mm256_add_epi32(sum_ref0, ref0next_reg); in vpx_sad64x64x4d_avx2()
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Dsad_avx2.c30 _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
35 sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
62 _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
67 sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
112 _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
118 sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
150 _mm256_add_epi32(sum_sad, _mm256_add_epi32(sad1_reg, sad2_reg)); \
156 sum_sad = _mm256_add_epi32(sum_sad, sum_sad_h); \
Dvariance_impl_avx2.c84 _mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_low, madd_high)); in vpx_get16x16var_avx2()
183 _mm256_add_epi32(madd_ref_src, _mm256_add_epi32(madd_low, madd_high)); in vpx_get32x32var_avx2()
202 expand_sum = _mm256_add_epi32(expand_sum_low, expand_sum_high); in vpx_get32x32var_avx2()
208 expand_madd = _mm256_add_epi32(expand_madd_low, expand_madd_high); in vpx_get32x32var_avx2()
213 ex_expand_sum = _mm256_add_epi32(ex_expand_sum_low, ex_expand_sum_high); in vpx_get32x32var_avx2()
219 madd_ref_src = _mm256_add_epi32(madd_ref_src, expand_madd); in vpx_get32x32var_avx2()
220 sum_ref_src = _mm256_add_epi32(sum_ref_src, ex_expand_sum); in vpx_get32x32var_avx2()
276 sse_reg = _mm256_add_epi32(sse_reg, exp_src_lo); \
277 sse_reg = _mm256_add_epi32(sse_reg, exp_src_hi);
285 sse_reg = _mm256_add_epi32(sse_reg, sse_reg_hi); \
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Dhighbd_convolve_avx2.c291 a = _mm256_add_epi32(a0, a1); in filter_8x1_pixels()
298 a = _mm256_add_epi32(a, min); in filter_8x1_pixels()
302 a = _mm256_add_epi32(a, max); in filter_8x1_pixels()
306 a = _mm256_add_epi32(a, rounding); in filter_8x1_pixels()
442 x0 = _mm256_add_epi32(x0, rounding); in filter_16_2t_pixels()
443 x1 = _mm256_add_epi32(x1, rounding); in filter_16_2t_pixels()
452 x0 = _mm256_add_epi32(x0, rounding); in filter_8x1_2t_pixels()
/external/skia/src/opts/
DSkOpts_hsw.cpp49 accum04 = _mm256_add_epi32(accum04, _mm256_madd_epi16(_084C, interlaced_coeffs)); in convolve_vertically()
50 accum15 = _mm256_add_epi32(accum15, _mm256_madd_epi16(_195D, interlaced_coeffs)); in convolve_vertically()
51 accum26 = _mm256_add_epi32(accum26, _mm256_madd_epi16(_2A6E, interlaced_coeffs)); in convolve_vertically()
52 accum37 = _mm256_add_epi32(accum37, _mm256_madd_epi16(_3B7F, interlaced_coeffs)); in convolve_vertically()
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_error_avx2.c44 dqcoeff_256 = _mm256_add_epi32(dqcoeff_256, dqcoeff_hi); in vp9_block_error_avx2()
45 coeff_256 = _mm256_add_epi32(coeff_256, coeff_hi); in vp9_block_error_avx2()
72 dqcoeff_0 = _mm256_add_epi32(dqcoeff_0, dqcoeff_1); in vp9_block_error_avx2()
74 coeff_0 = _mm256_add_epi32(coeff_0, coeff_1); in vp9_block_error_avx2()
/external/clang/test/CodeGen/
Davx2-builtins.c44 return _mm256_add_epi32(a, b); in test_mm256_add_epi32()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdintrin.h536 #define _simd_add_epi32 _mm256_add_epi32
/external/clang/lib/Headers/
Davx2intrin.h94 _mm256_add_epi32(__m256i __a, __m256i __b) in _mm256_add_epi32() function