Searched refs:addRegMask (Results 1 – 12 of 12) sorted by relevance
153 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { in addRegMask() function
453 MIB.addRegMask(RegMask); in fuseCompareOperations()
641 .addRegMask(RegMask) in PredicateInstruction()651 .addRegMask(RegMask) in PredicateInstruction()
395 MIB.addRegMask(RM->getRegMask()); in AddOperand()
2266 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in ARMEmitLibcall()2411 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in SelectCall()
7500 MIB.addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
1331 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
1587 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
8736 MIB.addRegMask(TRI->getNoPreservedMask()); in emitEHSjLjSetJmp()
3322 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
23538 .addRegMask(RegMask) in EmitLoweredSegAlloca()23546 .addRegMask(RegMask) in EmitLoweredSegAlloca()23555 .addRegMask(RegMask) in EmitLoweredSegAlloca()23697 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()23709 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()23721 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()23840 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()24086 .addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()24089 .addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
3172 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()