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Searched refs:andnq (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dbmi.ll52 ; CHECK: andnq
/external/llvm/test/MC/X86/
Dx86_64-bmi-encoding.s57 andnq (%rax), %r11, %r10
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/X86/
Dsimple-tests.txt513 # CHECK: andnq %rax, %r15, %rax
519 # CHECK: andnq (%rax), %r15, %rax
/external/llvm/test/CodeGen/X86/
Dbmi.ll120 ; CHECK-NEXT: andnq %rsi, %rdi, %rax
258 ; CHECK-NEXT: andnq %rsi, %rdi, %rax
/external/llvm/test/MC/Disassembler/X86/
Dsimple-tests.txt587 # CHECK: andnq %rax, %r15, %rax
593 # CHECK: andnq (%rax), %r15, %rax
/external/v8/src/x64/
Dassembler-x64.h1797 void andnq(Register dst, Register src1, Register src2) { in andnq() function
1800 void andnq(Register dst, Register src1, const Operand& src2) { in andnq() function
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenAsmMatcher.inc2981 { X86::ANDN64rr, "andnq", Convert__Reg1_2__Reg1_1__Reg1_0, { MCK_GR64, MCK_GR64, MCK_GR64 }, 0},
2982 { X86::ANDN64rm, "andnq", Convert__Reg1_2__Reg1_1__Mem5_0, { MCK_Mem, MCK_GR64, MCK_GR64 }, 0},
DX86GenAsmWriter.inc3830 "genassist\t\000andw\t\000andl\t\000andq\t\000andb\t\000andnl\t\000andnq"