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Searched refs:anv_batch_emit (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/intel/vulkan/
DgenX_gpu_memcpy.c122 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_SGVS), sgvs); in genX()
126 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VS), vs); in genX()
127 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HS), hs); in genX()
128 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_TE), te); in genX()
129 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DS), DS); in genX()
130 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_GS), gs); in genX()
131 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_PS), gs); in genX()
133 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SBE), sbe) { in genX()
158 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) { in genX()
185 anv_batch_emit(&cmd_buffer->batch, GENX(MI_LOAD_REGISTER_IMM), load) { in genX()
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DgenX_state.c48 anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) { in genX()
55 anv_batch_emit(&batch, GENX(3DSTATE_VF_STATISTICS), vfs) in genX()
58 anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa); in genX()
60 anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) { in genX()
70 anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY), ck); in genX()
75 anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) { in genX()
86 anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe); in genX()
DgenX_cmd_buffer.c38 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_MEM), lrm) { in emit_lrm()
47 anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { in emit_lri()
65 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
71 anv_batch_emit(&cmd_buffer->batch, GENX(STATE_BASE_ADDRESS), sba) { in genX()
148 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
711 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
731 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
742 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
865 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
900 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pipe) { in genX()
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Dgen8_cmd_buffer.c73 anv_batch_emit(&cmd_buffer->batch, in gen8_cmd_buffer_emit_viewport()
102 anv_batch_emit(&cmd_buffer->batch, in gen8_cmd_buffer_emit_depth_viewport()
207 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { in genX()
251 anv_batch_emit(&cmd_buffer->batch, GEN9_3DSTATE_CC_STATE_POINTERS, ccp) { in genX()
284 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF), vf) { in genX()
314 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_INDEX_BUFFER), ib) { in genX()
352 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
376 anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) { in genX()
409 anv_batch_emit(&cmd_buffer->batch, GENX(MI_SEMAPHORE_WAIT), sem) { in genX()
DgenX_pipeline.c164 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_INSTANCING), vfi) { in emit_vertex_input()
207 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_VF_SGVS), sgvs) { in emit_vertex_input()
251 anv_batch_emit(batch, GEN7_PIPE_CONTROL, pc) { in genX()
259 anv_batch_emit(batch, GENX(3DSTATE_URB_VS), urb) { in genX()
291 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SBE), sbe); in emit_3dstate_sbe()
293 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SBE_SWIZ), sbe); in emit_3dstate_sbe()
528 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) { in emit_ms_state()
561 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) { in emit_ms_state()
829 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_PS_BLEND), blend) {
849 anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), bsp) {
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Dgen7_cmd_buffer.c88 anv_batch_emit(&cmd_buffer->batch, in gen7_cmd_buffer_emit_scissor()
197 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) { in genX()
223 anv_batch_emit(&cmd_buffer->batch, in genX()
236 anv_batch_emit(&cmd_buffer->batch, GEN75_3DSTATE_VF, vf) { in genX()
242 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_INDEX_BUFFER), ib) { in genX()
Danv_device.c1234 anv_batch_emit(&batch, GEN7_MI_BATCH_BUFFER_END, bbe); in anv_DeviceWaitIdle()
1235 anv_batch_emit(&batch, GEN7_MI_NOOP, noop); in anv_DeviceWaitIdle()
1574 anv_batch_emit(&batch, GEN7_MI_BATCH_BUFFER_END, bbe); in anv_CreateFence()
1575 anv_batch_emit(&batch, GEN7_MI_NOOP, noop); in anv_CreateFence()
Danv_batch_chain.c459 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_START, bbs) { in emit_batch_buffer_start()
784 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_BATCH_BUFFER_END, bbe); in anv_cmd_buffer_end_batch_buffer()
788 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_NOOP, noop); in anv_cmd_buffer_end_batch_buffer()
Danv_private.h762 #define anv_batch_emit(batch, cmd, name) \ macro