| /external/mesa3d/src/amd/addrlib/r800/ |
| D | egbaddrlib.cpp | 535 UINT_32 checkMask = pOut->pTileInfo->banks - 1; in ComputeSurfaceInfoMacroTiled()
877 macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / in ComputeSurfaceAlignmentsMacroTiled()
886 pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; in ComputeSurfaceAlignmentsMacroTiled()
926 switch (pTileInfo->banks) in SanityCheckMacroTiled()
986 if (pTileInfo->banks < pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
1009 ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); in SanityCheckMacroTiled()
1480 UINT_32 numBankBits = Log2(pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
1574 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1582 (numPipes * pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
2191 UINT_32 banks = pTileInfo->banks; in ComputeSurfaceCoordFromAddrMacroTiled() local
[all …]
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| D | ciaddrlib.cpp | 246 pOut->dccRamBaseAlign = pIn->tileInfo.banks * in HwlComputeDccInfo()
299 UINT_32 numOfBanks = pIn->pTileInfo->banks; in HwlComputeCmaskAddrFromCoord()
1288 pCfg->info.banks = 2; in ReadGbTileMode()
1385 pCfg->banks = 1 << (gbTileMode.f.num_banks + 1); in ReadGbMacroTileCfg()
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| D | siaddrlib.cpp | 2021 UINT_32 yBitToCheck = QLog2(pTileInfo->banks) - 1; in HwlComputeSurfaceCoord2DFromBankPipe()
2471 pInfo->banks = 2; in HwlSetupTileCfg()
2535 pCfg->info.banks = 1 << (gbTileMode.f.num_banks + 1); in ReadGbTileMode()
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| /external/speex/libspeex/ |
| D | filterbank.c | 54 FilterBank *filterbank_new(int banks, spx_word32_t sampling, int len, int type) in filterbank_new() argument
64 mel_interval = PDIV32(max_mel,banks-1); in filterbank_new()
67 bank->nb_banks = banks; in filterbank_new()
75 bank->scaling = (float*)speex_alloc(banks*sizeof(float)); in filterbank_new()
91 if (id1>banks-2) in filterbank_new()
93 id1 = banks-2; in filterbank_new()
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| D | filterbank.h | 52 FilterBank *filterbank_new(int banks, spx_word32_t sampling, int len, int type);
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| /external/brotli/enc/ |
| D | hash_forgetful_chain_inc.h | 52 FN(Bank) banks[NUM_BANKS];
111 self->banks[bank].slots[idx].delta = (uint16_t)delta; in FN()
112 self->banks[bank].slots[idx].next = self->head[key]; in FN()
215 slot = self->banks[bank].slots[last].next; in FN()
216 delta = self->banks[bank].slots[last].delta; in FN()
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| /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/math/ec/ |
| D | LongArray.java | 1202 int width, positions, top, banks; in modMultiplyAlt() local
1208 width = 4; positions = 16; top = 64; banks = 8; in modMultiplyAlt()
1219 int bTotal = bMax * banks, stride = width * banks; in modMultiplyAlt()
1249 for (int bank = 1; bank < banks; ++bank) in modMultiplyAlt()
1283 if (++bank == banks) in modMultiplyAlt()
1311 shiftUp(c, aLen, bTotal, banks); in modMultiplyAlt()
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| /external/syslinux/com32/mboot/ |
| D | vesa.h | 70 uint8_t banks; member
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| D | initvesa.c | 133 if (mi->banks > 1 && mi->bank_size) in set_graphics_mode()
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| /external/syslinux/com32/lib/sys/vesa/ |
| D | vesa.h | 71 uint8_t banks; member
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| /external/mesa3d/src/amd/vulkan/winsys/amdgpu/ |
| D | radv_amdgpu_surface.c | 410 AddrTileInfoIn.banks = surf->num_banks; in radv_amdgpu_winsys_surface_init()
477 surf->num_banks = AddrSurfInfoOut.pTileInfo->banks; in radv_amdgpu_winsys_surface_init()
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| /external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| D | amdgpu_surface.c | 444 AddrTileInfoIn.banks = surf->num_banks; in amdgpu_surface_init()
518 surf->num_banks = AddrSurfInfoOut.pTileInfo->banks; in amdgpu_surface_init()
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| /external/syslinux/core/ |
| D | bios.c | 309 if (mi->banks > 1 && mi->bank_size) { in bios_vesacon_set_mode()
311 mi->banks, mi->bank_size, mi->image_pages); in bios_vesacon_set_mode()
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeRegisterInfo.td | 14 // We have banks of 32 registers each.
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| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-AdvSIMD-Scalar.ll | 12 ; banks copies that cannot be coalesced.
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPU.td | 107 "The number of LDS banks per compute unit."
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| /external/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | arm64-regbankselect.mir | 162 # Check that we are able to propagate register banks from phis.
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 19 // We have banks of 32 registers each.
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| /external/mesa3d/src/amd/addrlib/ |
| D | addrinterface.h | 396 UINT_32 banks; ///< Number of banks, numerical value member
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| /external/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.td | 29 // We have banks of 32 registers each.
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| /external/mesa3d/src/amd/addrlib/core/ |
| D | addrlib.cpp | 2052 baseAlign *= pTileInfo->banks; in ComputeCmaskBaseAlign()
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| /external/brotli/tests/testdata/ |
| D | plrabn12.txt | 538 Was fair Damascus, on the fertile banks
1448 Four ways their flying march, along the banks
5842 All but within those banks, where rivers now
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| D | alice29.txt | 1254 `I've tried the roots of trees, and I've tried banks, and I've
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| /external/guava/guava-tests/test/com/google/common/io/testdata/ |
| D | alice_in_wonderland.txt | 1251 `I've tried the roots of trees, and I've tried banks, and I've
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| /external/icu/icu4j/main/shared/data/ |
| D | Transliterator_Han_Latin_Definition.txt | 536 㽩 < connected\-banks\-of\-earth\-or\-paths\-in\-the\-field;
36379 㽩 > connected\-banks\-of\-earth\-or\-paths\-in\-the\-field;
|