| /external/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_batch.c | 38 batch_init(struct fd_batch *batch) in batch_init() argument
40 struct fd_context *ctx = batch->ctx; in batch_init()
44 util_queue_fence_init(&batch->flush_fence); in batch_init()
56 batch->draw = fd_ringbuffer_new(ctx->screen->pipe, size); in batch_init()
57 batch->binning = fd_ringbuffer_new(ctx->screen->pipe, size); in batch_init()
58 batch->gmem = fd_ringbuffer_new(ctx->screen->pipe, size); in batch_init()
60 fd_ringbuffer_set_parent(batch->gmem, NULL); in batch_init()
61 fd_ringbuffer_set_parent(batch->draw, batch->gmem); in batch_init()
62 fd_ringbuffer_set_parent(batch->binning, batch->gmem); in batch_init()
64 batch->in_fence_fd = -1; in batch_init()
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| D | freedreno_draw.c | 43 resource_read(struct fd_batch *batch, struct pipe_resource *prsc) in resource_read() argument
47 fd_batch_resource_used(batch, fd_resource(prsc), false); in resource_read()
51 resource_written(struct fd_batch *batch, struct pipe_resource *prsc) in resource_written() argument
55 fd_batch_resource_used(batch, fd_resource(prsc), true); in resource_written()
62 struct fd_batch *batch = ctx->batch; in fd_draw_vbo() local
63 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fd_draw_vbo()
88 fd_batch_reset(batch); in fd_draw_vbo()
92 batch->blit = ctx->in_blit; in fd_draw_vbo()
93 batch->back_blit = ctx->in_shadow; in fd_draw_vbo()
98 fd_hw_query_set_stage(batch, batch->draw, FD_STAGE_DRAW); in fd_draw_vbo()
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| D | freedreno_gmem.c | 107 calculate_tiles(struct fd_batch *batch) in calculate_tiles() argument
109 struct fd_context *ctx = batch->ctx; in calculate_tiles()
111 struct pipe_scissor_state *scissor = &batch->max_scissor; in calculate_tiles()
112 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in calculate_tiles()
123 bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)); in calculate_tiles()
310 render_tiles(struct fd_batch *batch) in render_tiles() argument
312 struct fd_context *ctx = batch->ctx; in render_tiles()
316 ctx->emit_tile_init(batch); in render_tiles()
318 if (batch->restore) in render_tiles()
327 ctx->emit_tile_prep(batch, tile); in render_tiles()
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| D | freedreno_query_hw.c | 64 get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring, in get_sample() argument
67 struct fd_context *ctx = batch->ctx; in get_sample()
73 if (!batch->sample_cache[idx]) { in get_sample()
75 ctx->sample_providers[idx]->get_sample(batch, ring); in get_sample()
76 fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp); in get_sample()
77 util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp); in get_sample()
78 batch->needs_flush = true; in get_sample()
81 fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]); in get_sample()
87 clear_sample_cache(struct fd_batch *batch) in clear_sample_cache() argument
91 for (i = 0; i < ARRAY_SIZE(batch->sample_cache); i++) in clear_sample_cache()
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| D | freedreno_batch_cache.c | 136 struct fd_batch *batch = NULL; in fd_bc_flush() local
137 fd_batch_reference_locked(&batch, (struct fd_batch *)entry->data); in fd_bc_flush()
138 if (batch->ctx == ctx) { in fd_bc_flush()
140 fd_batch_reference(&last_batch, batch); in fd_bc_flush()
141 fd_batch_flush(batch, false); in fd_bc_flush()
144 fd_batch_reference_locked(&batch, NULL); in fd_bc_flush()
159 struct fd_batch *batch; in fd_bc_invalidate_context() local
163 foreach_batch(batch, cache, cache->batch_mask) { in fd_bc_invalidate_context()
164 if (batch->ctx == ctx) in fd_bc_invalidate_context()
165 fd_batch_reference_locked(&batch, NULL); in fd_bc_invalidate_context()
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| D | freedreno_batch.h | 203 void fd_batch_reset(struct fd_batch *batch);
204 void fd_batch_sync(struct fd_batch *batch);
205 void fd_batch_flush(struct fd_batch *batch, bool sync);
206 void fd_batch_resource_used(struct fd_batch *batch, struct fd_resource *rsc, bool write);
207 void fd_batch_check_size(struct fd_batch *batch);
210 void __fd_batch_describe(char* buf, const struct fd_batch *batch);
211 void __fd_batch_destroy(struct fd_batch *batch);
225 fd_batch_reference(struct fd_batch **ptr, struct fd_batch *batch) in fd_batch_reference() argument
228 if (pipe_reference_described(&(*ptr)->reference, &batch->reference, in fd_batch_reference()
231 *ptr = batch; in fd_batch_reference()
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| /external/mesa3d/src/gallium/winsys/i915/drm/ |
| D | i915_drm_batchbuffer.c | 30 i915_drm_batchbuffer(struct i915_winsys_batchbuffer *batch) in i915_drm_batchbuffer() argument
32 return (struct i915_drm_batchbuffer *)batch; in i915_drm_batchbuffer()
36 i915_drm_batchbuffer_reset(struct i915_drm_batchbuffer *batch) in i915_drm_batchbuffer_reset() argument
38 struct i915_drm_winsys *idws = i915_drm_winsys(batch->base.iws); in i915_drm_batchbuffer_reset()
40 if (batch->bo) in i915_drm_batchbuffer_reset()
41 drm_intel_bo_unreference(batch->bo); in i915_drm_batchbuffer_reset()
42 batch->bo = drm_intel_bo_alloc(idws->gem_manager, in i915_drm_batchbuffer_reset()
44 batch->actual_size, in i915_drm_batchbuffer_reset()
47 memset(batch->base.map, 0, batch->actual_size); in i915_drm_batchbuffer_reset()
48 batch->base.ptr = batch->base.map; in i915_drm_batchbuffer_reset()
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| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | intel_batchbuffer.c | 39 intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
43 intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, in intel_batchbuffer_init() argument
46 intel_batchbuffer_reset(batch, bufmgr, has_llc); in intel_batchbuffer_init()
49 batch->cpu_map = malloc(BATCH_SZ); in intel_batchbuffer_init()
50 batch->map = batch->cpu_map; in intel_batchbuffer_init()
51 batch->map_next = batch->cpu_map; in intel_batchbuffer_init()
56 intel_batchbuffer_reset(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr, in intel_batchbuffer_reset() argument
59 if (batch->last_bo != NULL) { in intel_batchbuffer_reset()
60 drm_intel_bo_unreference(batch->last_bo); in intel_batchbuffer_reset()
61 batch->last_bo = NULL; in intel_batchbuffer_reset()
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| D | genX_blorp_exec.c | 38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n) in blorp_emit_dwords() argument
40 assert(batch->blorp->driver_ctx == batch->driver_batch); in blorp_emit_dwords()
41 struct brw_context *brw = batch->driver_batch; in blorp_emit_dwords()
44 uint32_t *map = brw->batch.map_next; in blorp_emit_dwords()
45 brw->batch.map_next += n; in blorp_emit_dwords()
51 blorp_emit_reloc(struct blorp_batch *batch, in blorp_emit_reloc() argument
54 assert(batch->blorp->driver_ctx == batch->driver_batch); in blorp_emit_reloc()
55 struct brw_context *brw = batch->driver_batch; in blorp_emit_reloc()
57 uint32_t offset = (char *)location - (char *)brw->batch.map; in blorp_emit_reloc()
59 return intel_batchbuffer_reloc64(&brw->batch, address.buffer, offset, in blorp_emit_reloc()
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| D | intel_batchbuffer.h | 42 void intel_batchbuffer_init(struct intel_batchbuffer *batch, dri_bufmgr *bufmgr,
44 void intel_batchbuffer_free(struct intel_batchbuffer *batch);
66 uint32_t intel_batchbuffer_reloc(struct intel_batchbuffer *batch,
72 uint64_t intel_batchbuffer_reloc64(struct intel_batchbuffer *batch,
79 #define USED_BATCH(batch) ((uintptr_t)((batch).map_next - (batch).map)) argument
98 intel_batchbuffer_space(struct intel_batchbuffer *batch) in intel_batchbuffer_space() argument
100 return (batch->state_batch_offset - batch->reserved_space) in intel_batchbuffer_space()
101 - USED_BATCH(*batch) * 4; in intel_batchbuffer_space()
106 intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, GLuint dword) in intel_batchbuffer_emit_dword() argument
109 assert(intel_batchbuffer_space(batch) >= 4); in intel_batchbuffer_emit_dword()
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| D | brw_state_batch.c | 44 struct intel_batchbuffer *batch = &brw->batch; in brw_track_state_batch() local
52 batch->bo->size / 32); in brw_track_state_batch()
91 4 * USED_BATCH(brw->batch)); in brw_annotate_aub()
102 drm_intel_bufmgr_gem_set_aub_annotations(brw->batch.bo, annotations, in brw_annotate_aub()
129 struct intel_batchbuffer *batch = &brw->batch; in __brw_state_batch() local
132 assert(size < batch->bo->size); in __brw_state_batch()
133 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment); in __brw_state_batch()
139 if (batch->state_batch_offset < size || in __brw_state_batch()
140 offset < 4 * USED_BATCH(*batch) + batch->reserved_space) { in __brw_state_batch()
142 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment); in __brw_state_batch()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_batchbuffer.c | 43 intel->batch.cpu_map = malloc(intel->maxBatchSize); in intel_batchbuffer_init()
44 intel->batch.map = intel->batch.cpu_map; in intel_batchbuffer_init()
50 if (intel->batch.last_bo != NULL) { in intel_batchbuffer_reset()
51 drm_intel_bo_unreference(intel->batch.last_bo); in intel_batchbuffer_reset()
52 intel->batch.last_bo = NULL; in intel_batchbuffer_reset()
54 intel->batch.last_bo = intel->batch.bo; in intel_batchbuffer_reset()
56 intel->batch.bo = drm_intel_bo_alloc(intel->bufmgr, "batchbuffer", in intel_batchbuffer_reset()
59 intel->batch.reserved_space = BATCH_RESERVED; in intel_batchbuffer_reset()
60 intel->batch.used = 0; in intel_batchbuffer_reset()
66 free(intel->batch.cpu_map); in intel_batchbuffer_free()
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| D | intel_batchbuffer.h | 76 return (intel->batch.bo->size - intel->batch.reserved_space) in intel_batchbuffer_space()
77 - intel->batch.used*4; in intel_batchbuffer_space()
87 intel->batch.map[intel->batch.used++] = dword; in intel_batchbuffer_emit_dword()
112 intel->batch.emit = intel->batch.used; in intel_batchbuffer_begin()
114 intel->batch.total = n; in intel_batchbuffer_begin()
122 struct intel_batchbuffer *batch = &intel->batch; in intel_batchbuffer_advance() local
123 unsigned int _n = batch->used - batch->emit; in intel_batchbuffer_advance()
124 assert(batch->total != 0); in intel_batchbuffer_advance()
125 if (_n != batch->total) { in intel_batchbuffer_advance()
127 _n, batch->total); in intel_batchbuffer_advance()
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| /external/mesa3d/src/gallium/drivers/i915/ |
| D | i915_batchbuffer.h | 37 i915_winsys_batchbuffer_space(struct i915_winsys_batchbuffer *batch) in i915_winsys_batchbuffer_space() argument
39 return batch->size - (batch->ptr - batch->map); in i915_winsys_batchbuffer_space()
43 i915_winsys_batchbuffer_check(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_check() argument
46 return dwords * 4 <= i915_winsys_batchbuffer_space(batch); in i915_winsys_batchbuffer_check()
50 i915_winsys_batchbuffer_dword_unchecked(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_dword_unchecked() argument
53 *(unsigned *)batch->ptr = dword; in i915_winsys_batchbuffer_dword_unchecked()
54 batch->ptr += 4; in i915_winsys_batchbuffer_dword_unchecked()
58 i915_winsys_batchbuffer_float(struct i915_winsys_batchbuffer *batch, in i915_winsys_batchbuffer_float() argument
63 assert (i915_winsys_batchbuffer_space(batch) >= 4); in i915_winsys_batchbuffer_float()
64 i915_winsys_batchbuffer_dword_unchecked(batch, uif.ui); in i915_winsys_batchbuffer_float()
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| /external/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 48 blorp_emit_dwords(struct blorp_batch *batch, unsigned n);
51 blorp_emit_reloc(struct blorp_batch *batch,
55 blorp_alloc_dynamic_state(struct blorp_batch *batch,
61 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
65 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
71 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size);
74 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
78 blorp_emit_urb_config(struct blorp_batch *batch, unsigned vs_entry_size);
85 _blorp_combine_address(struct blorp_batch *batch, void *location, in _blorp_combine_address() argument
91 return blorp_emit_reloc(batch, location, address, delta); in _blorp_combine_address()
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| D | blorp_clear.c | 302 blorp_fast_clear(struct blorp_batch *batch, in blorp_fast_clear() argument
319 get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf, in blorp_fast_clear()
322 blorp_params_get_clear_kernel(batch->blorp, ¶ms, true); in blorp_fast_clear()
324 brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, in blorp_fast_clear()
328 batch->blorp->exec(batch, ¶ms); in blorp_fast_clear()
353 blorp_clear(struct blorp_batch *batch, in blorp_clear() argument
413 blorp_params_get_clear_kernel(batch->blorp, ¶ms, in blorp_clear()
417 brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, in blorp_clear()
428 batch->blorp->exec(batch, ¶ms); in blorp_clear()
436 blorp_clear_depth_stencil(struct blorp_batch *batch, in blorp_clear_depth_stencil() argument
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| /external/mesa3d/src/intel/vulkan/ |
| D | genX_blorp_exec.c | 38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n) in blorp_emit_dwords() argument
40 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_emit_dwords()
41 return anv_batch_emit_dwords(&cmd_buffer->batch, n); in blorp_emit_dwords()
45 blorp_emit_reloc(struct blorp_batch *batch, in blorp_emit_reloc() argument
48 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_emit_reloc()
49 assert(cmd_buffer->batch.start <= location && in blorp_emit_reloc()
50 location < cmd_buffer->batch.end); in blorp_emit_reloc()
51 return anv_batch_emit_reloc(&cmd_buffer->batch, location, in blorp_emit_reloc()
56 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset, in blorp_surface_reloc() argument
59 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch; in blorp_surface_reloc()
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| D | anv_batch_chain.c | 196 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords) in anv_batch_emit_dwords() argument
198 if (batch->next + num_dwords * 4 > batch->end) in anv_batch_emit_dwords()
199 batch->extend_cb(batch, batch->user_data); in anv_batch_emit_dwords()
201 void *p = batch->next; in anv_batch_emit_dwords()
203 batch->next += num_dwords * 4; in anv_batch_emit_dwords()
204 assert(batch->next <= batch->end); in anv_batch_emit_dwords()
210 anv_batch_emit_reloc(struct anv_batch *batch, in anv_batch_emit_reloc() argument
213 return anv_reloc_list_add(batch->relocs, batch->alloc, in anv_batch_emit_reloc()
214 location - batch->start, bo, delta); in anv_batch_emit_reloc()
218 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other) in anv_batch_emit_batch() argument
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| D | genX_gpu_memcpy.c | 92 dw = anv_batch_emitn(&cmd_buffer->batch, 5, GENX(3DSTATE_VERTEX_BUFFERS)); in genX()
93 GENX(VERTEX_BUFFER_STATE_pack)(&cmd_buffer->batch, dw + 1, in genX()
108 dw = anv_batch_emitn(&cmd_buffer->batch, 3, GENX(3DSTATE_VERTEX_ELEMENTS)); in genX()
109 GENX(VERTEX_ELEMENT_STATE_pack)(&cmd_buffer->batch, dw + 1, in genX()
122 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VF_SGVS), sgvs); in genX()
126 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_VS), vs); in genX()
127 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_HS), hs); in genX()
128 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_TE), te); in genX()
129 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_DS), DS); in genX()
130 anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_GS), gs); in genX()
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| /external/libdrm/intel/ |
| D | Makefile.am | 52 tests/gen4-3d.batch \
53 tests/gm45-3d.batch \
54 tests/gen5-3d.batch \
55 tests/gen6-3d.batch \
56 tests/gen7-2d-copy.batch \
57 tests/gen7-3d.batch
60 $(BATCHES:.batch=.batch.sh) \
65 $(BATCHES:.batch=.batch.sh) \
66 $(BATCHES:.batch=.batch-ref.txt) \
67 $(BATCHES:.batch=.batch-ref.txt) \
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| /external/mesa3d/src/gallium/drivers/freedreno/a3xx/ |
| D | fd3_gmem.c | 131 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
133 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in use_hw_binning()
156 static void update_vsc_pipe(struct fd_batch *batch);
158 emit_binning_workaround(struct fd_batch *batch) in emit_binning_workaround() argument
160 struct fd_context *ctx = batch->ctx; in emit_binning_workaround()
162 struct fd_ringbuffer *ring = batch->gmem; in emit_binning_workaround()
259 fd_wfi(batch, ring); in emit_binning_workaround()
286 fd_reset_wfi(batch); in emit_binning_workaround()
294 fd_wfi(batch, ring); in emit_binning_workaround()
311 emit_gmem2mem_surf(struct fd_batch *batch, in emit_gmem2mem_surf() argument
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| /external/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_gmem.c | 211 patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode) in patch_draws() argument
214 for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) { in patch_draws()
215 struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i); in patch_draws()
218 util_dynarray_resize(&batch->draw_patches, 0); in patch_draws()
223 fd5_emit_tile_init(struct fd_batch *batch) in fd5_emit_tile_init() argument
225 struct fd_ringbuffer *ring = batch->gmem; in fd5_emit_tile_init()
227 fd5_emit_restore(batch, ring); in fd5_emit_tile_init()
242 fd_wfi(batch, ring); in fd5_emit_tile_init()
250 fd5_set_render_mode(batch->ctx, ring, GMEM); in fd5_emit_tile_init()
255 fd5_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile) in fd5_emit_tile_prep() argument
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| /external/mesa3d/src/gallium/drivers/freedreno/a4xx/ |
| D | fd4_gmem.c | 135 use_hw_binning(struct fd_batch *batch) in use_hw_binning() argument
137 struct fd_gmem_stateobj *gmem = &batch->ctx->gmem; in use_hw_binning()
138 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in use_hw_binning()
150 emit_gmem2mem_surf(struct fd_batch *batch, bool stencil, in emit_gmem2mem_surf() argument
153 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf()
183 fd4_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, in emit_gmem2mem_surf()
188 fd4_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) in fd4_emit_tile_gmem2mem() argument
190 struct fd_context *ctx = batch->ctx; in fd4_emit_tile_gmem2mem()
192 struct fd_ringbuffer *ring = batch->gmem; in fd4_emit_tile_gmem2mem()
193 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fd4_emit_tile_gmem2mem()
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| /external/jsoncpp/src/lib_json/ |
| D | json_batchallocator.h | 44 for (BatchInfo* batch = batches_; batch;) { in ~BatchAllocator() local
45 BatchInfo* nextBatch = batch->next_; in ~BatchAllocator()
46 free(batch); in ~BatchAllocator()
47 batch = nextBatch; in ~BatchAllocator()
103 BatchInfo* batch = static_cast<BatchInfo*>(malloc(mallocSize)); in allocateBatch() local
104 batch->next_ = 0; in allocateBatch()
105 batch->used_ = batch->buffer_; in allocateBatch()
106 batch->end_ = batch->buffer_ + objectsPerPage; in allocateBatch()
107 return batch; in allocateBatch()
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| /external/mesa3d/src/gallium/drivers/freedreno/a2xx/ |
| D | fd2_gmem.c | 59 emit_gmem2mem_surf(struct fd_batch *batch, uint32_t base, in emit_gmem2mem_surf() argument
62 struct fd_ringbuffer *ring = batch->gmem; in emit_gmem2mem_surf()
93 fd_draw(batch, ring, DI_PT_RECTLIST, IGNORE_VISIBILITY, in emit_gmem2mem_surf()
98 fd2_emit_tile_gmem2mem(struct fd_batch *batch, struct fd_tile *tile) in fd2_emit_tile_gmem2mem() argument
100 struct fd_context *ctx = batch->ctx; in fd2_emit_tile_gmem2mem()
102 struct fd_ringbuffer *ring = batch->gmem; in fd2_emit_tile_gmem2mem()
103 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in fd2_emit_tile_gmem2mem()
163 if (batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) in fd2_emit_tile_gmem2mem()
164 emit_gmem2mem_surf(batch, tile->bin_w * tile->bin_h, pfb->zsbuf); in fd2_emit_tile_gmem2mem()
166 if (batch->resolve & FD_BUFFER_COLOR) in fd2_emit_tile_gmem2mem()
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