Searched refs:ce_ib (Results 1 – 5 of 5) sorted by relevance
/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_hw_context.c | 64 struct radeon_winsys_cs *ce_ib = ctx->ce_ib; in si_need_cs_space() local 91 (ce_ib && !ctx->b.ws->cs_check_space(ce_ib, si_ce_needed_cs_space()))) in si_need_cs_space() 204 else if (ctx->ce_ib) in si_begin_new_cs() 205 si_ce_enable_loads(ctx->ce_ib); in si_begin_new_cs()
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D | si_descriptors.c | 147 radeon_emit(sctx->ce_ib, PKT3(PKT3_DUMP_CONST_RAM, 3, 0)); in si_ce_upload() 148 radeon_emit(sctx->ce_ib, ce_offset); in si_ce_upload() 149 radeon_emit(sctx->ce_ib, size / 4); in si_ce_upload() 150 radeon_emit(sctx->ce_ib, va); in si_ce_upload() 151 radeon_emit(sctx->ce_ib, va >> 32); in si_ce_upload() 170 ib = sctx->ce_ib; in si_ce_reinitialize_descriptors() 211 if (sctx->ce_ib) { in si_upload_descriptors() 225 radeon_emit(sctx->ce_ib, in si_upload_descriptors() 227 radeon_emit(sctx->ce_ib, desc->ce_offset + begin * 4); in si_upload_descriptors() 228 radeon_emit_array(sctx->ce_ib, list + begin, count); in si_upload_descriptors()
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D | si_pipe.c | 194 sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs); in si_create_context() 195 if (!sctx->ce_ib) in si_create_context()
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D | si_pipe.h | 217 struct radeon_winsys_cs *ce_ib; member
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D | si_state_draw.c | 971 radeon_emit(sctx->ce_ib, PKT3(PKT3_INCREMENT_CE_COUNTER, 0, 0)); in si_ce_pre_draw_synchronization() 972 radeon_emit(sctx->ce_ib, 1); in si_ce_pre_draw_synchronization()
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