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/external/llvm/test/Transforms/InstCombine/
Dphi-preserve-ir-flags.ll6 define float @func1(float %a, float %b, float %c, i1 %cond) {
8 br i1 %cond, label %cond.true, label %cond.false
10 cond.true:
12 br label %cond.end
14 cond.false:
16 br label %cond.end
19 ; CHECK-LABEL: cond.end
20 ; CHECK [[PHI:%[^ ]*]] = phi float [ %b, %cond.true ], [ %c, %cond.false ]
22 cond.end:
23 %e = phi float [ %sub0, %cond.true ], [ %sub1, %cond.false ]
[all …]
/external/llvm/test/CodeGen/ARM/
Dfast-isel-br-phi.ll11 br i1 %cmp, label %cond.true, label %cond.false
13 cond.true: ; preds = %entry
14 br label %cond.end
16 cond.false: ; preds = %entry
17 br label %cond.end
19 cond.end: ; preds = %cond.false, %cond.true
20 %cond = phi i1 [ 0, %cond.true ], [ 1, %cond.false ]
21 br i1 %cond, label %cond.true8, label %cond.false8
23 cond.true8: ; preds = %cond.end
24 br label %cond.end8
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/external/llvm/test/CodeGen/Mips/
Dseleq.ll18 br i1 %cmp, label %cond.true, label %cond.false
20 cond.true: ; preds = %entry
22 br label %cond.end
24 cond.false: ; preds = %entry
26 br label %cond.end
28 cond.end: ; preds = %cond.false, %cond.true
29 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
30 store i32 %cond, i32* @z1, align 4
34 br i1 %cmp1, label %cond.true2, label %cond.false3
36 cond.true2: ; preds = %cond.end
[all …]
Dseleqk.ll17 br i1 %cmp, label %cond.true, label %cond.false
19 cond.true: ; preds = %entry
21 br label %cond.end
23 cond.false: ; preds = %entry
25 br label %cond.end
27 cond.end: ; preds = %cond.false, %cond.true
28 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
29 store i32 %cond, i32* @z1, align 4
32 br i1 %cmp1, label %cond.true2, label %cond.false3
34 cond.true2: ; preds = %cond.end
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Dselltk.ll18 br i1 %cmp, label %cond.true, label %cond.false
20 cond.true: ; preds = %entry
22 br label %cond.end
24 cond.false: ; preds = %entry
26 br label %cond.end
28 cond.end: ; preds = %cond.false, %cond.true
29 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
30 store i32 %cond, i32* @z1, align 4
33 br i1 %cmp1, label %cond.true2, label %cond.false3
35 cond.true2: ; preds = %cond.end
[all …]
Dselgek.ll18 br i1 %cmp, label %cond.true, label %cond.false
20 cond.true: ; preds = %entry
22 br label %cond.end
24 cond.false: ; preds = %entry
26 br label %cond.end
28 cond.end: ; preds = %cond.false, %cond.true
29 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
30 store i32 %cond, i32* @z1, align 4
33 br i1 %cmp1, label %cond.true2, label %cond.false3
35 cond.true2: ; preds = %cond.end
[all …]
Dselle.ll19 br i1 %cmp, label %cond.true, label %cond.false
21 cond.true: ; preds = %entry
23 br label %cond.end
25 cond.false: ; preds = %entry
27 br label %cond.end
29 cond.end: ; preds = %cond.false, %cond.true
30 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
31 store i32 %cond, i32* @z1, align 4
35 br i1 %cmp1, label %cond.true2, label %cond.false3
37 cond.true2: ; preds = %cond.end
[all …]
Dselgt.ll20 br i1 %cmp, label %cond.true, label %cond.false
22 cond.true: ; preds = %entry
24 br label %cond.end
26 cond.false: ; preds = %entry
28 br label %cond.end
30 cond.end: ; preds = %cond.false, %cond.true
31 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
32 store i32 %cond, i32* @z1, align 4
36 br i1 %cmp1, label %cond.true2, label %cond.false3
38 cond.true2: ; preds = %cond.end
[all …]
Dselne.ll19 br i1 %cmp, label %cond.true, label %cond.false
21 cond.true: ; preds = %entry
23 br label %cond.end
25 cond.false: ; preds = %entry
27 br label %cond.end
29 cond.end: ; preds = %cond.false, %cond.true
30 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]
31 store i32 %cond, i32* @z1, align 4
35 br i1 %cmp1, label %cond.true2, label %cond.false3
37 cond.true2: ; preds = %cond.end
[all …]
Dselnek.ll17 br i1 %cmp, label %cond.true, label %cond.false
19 cond.true: ; preds = %entry
21 br label %cond.end
23 cond.false: ; preds = %entry
25 br label %cond.end
27 cond.end: ; preds = %cond.false, %cond.true
28 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]
29 store i32 %cond, i32* @z1, align 4
32 br i1 %cmp1, label %cond.true2, label %cond.false3
34 cond.true2: ; preds = %cond.end
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/external/libevent/
Devthread_win32.c128 CONDITION_VARIABLE *cond = mm_malloc(sizeof(CONDITION_VARIABLE)); in evthread_win32_condvar_alloc() local
129 if (!cond) in evthread_win32_condvar_alloc()
131 InitializeConditionVariable_fn(cond); in evthread_win32_condvar_alloc()
132 return cond; in evthread_win32_condvar_alloc()
138 CONDITION_VARIABLE *cond = _cond; in evthread_win32_condvar_free() local
140 mm_free(cond); in evthread_win32_condvar_free()
146 CONDITION_VARIABLE *cond = _cond; in evthread_win32_condvar_signal() local
148 WakeAllConditionVariable_fn(cond); in evthread_win32_condvar_signal()
150 WakeConditionVariable_fn(cond); in evthread_win32_condvar_signal()
157 CONDITION_VARIABLE *cond = _cond; in evthread_win32_condvar_wait() local
[all …]
/external/vixl/src/aarch32/
Ddisasm-aarch32.h102 ConditionPrinter(const ITBlock& it_block, Condition cond) in ConditionPrinter() argument
103 : it_block_(it_block), cond_(cond) {} in ConditionPrinter()
104 friend std::ostream& operator<<(std::ostream& os, ConditionPrinter cond) {
105 if (cond.it_block_.InITBlock() && cond.cond_.Is(al) &&
106 !cond.cond_.IsNone()) {
109 return os << cond.cond_;
192 virtual DisassemblerStream& operator<<(const ConditionPrinter& cond) {
193 os_ << cond;
196 virtual DisassemblerStream& operator<<(Condition cond) {
197 os_ << cond;
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Dassembler-aarch32.cc1798 void Assembler::adc(Condition cond, in adc() argument
1804 CheckIT(cond); in adc()
1822 if (immediate_a32.IsValid() && cond.IsNotNever()) { in adc()
1823 EmitA32(0x02a00000U | (cond.GetCondition() << 28) | in adc()
1858 if (shift.IsValidAmount(amount) && cond.IsNotNever()) { in adc()
1860 EmitA32(0x00a00000U | (cond.GetCondition() << 28) | in adc()
1872 if (cond.IsNotNever() && ((!rd.IsPC() && !rn.IsPC() && !rm.IsPC() && in adc()
1875 EmitA32(0x00a00010U | (cond.GetCondition() << 28) | in adc()
1883 Delegate(kAdc, &Assembler::adc, cond, size, rd, rn, operand); in adc()
1886 void Assembler::adcs(Condition cond, in adcs() argument
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Dmacro-assembler-aarch32.h191 ITScope(MacroAssembler* masm, Condition* cond, bool can_use_it = false)
192 : masm_(masm), cond_(*cond), can_use_it_(can_use_it) { in masm_()
207 *cond = al; in masm_()
249 Condition cond, in emit() argument
251 (masm->*asmfn)(cond, dt_, rt_, literal); in emit()
264 Condition cond, in emit() argument
266 (masm->*asmfn)(cond, dt_, rt_, literal); in emit()
279 Condition cond, in emit() argument
281 (masm->*asmfn)(cond, rt_, literal); in emit()
293 Condition cond, in emit() argument
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/external/mesa3d/include/c11/
Dthreads_win32.h171 static void impl_cond_do_signal(cnd_t *cond, int broadcast) in impl_cond_do_signal() argument
175 EnterCriticalSection(&cond->monitor); in impl_cond_do_signal()
176 if (cond->to_unblock != 0) { in impl_cond_do_signal()
177 if (cond->blocked == 0) { in impl_cond_do_signal()
178 LeaveCriticalSection(&cond->monitor); in impl_cond_do_signal()
182 cond->to_unblock += nsignal = cond->blocked; in impl_cond_do_signal()
183 cond->blocked = 0; in impl_cond_do_signal()
186 cond->to_unblock++; in impl_cond_do_signal()
187 cond->blocked--; in impl_cond_do_signal()
189 } else if (cond->blocked > cond->gone) { in impl_cond_do_signal()
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/external/llvm/test/Transforms/SimplifyCFG/
Dspeculate-vector-ops.ll16 br i1 %tobool, label %cond.else, label %cond.then
18 return: ; preds = %cond.end28
21 cond.then: ; preds = %entry
23 br label %cond.end
25 cond.else: ; preds = %entry
27 br label %cond.end
29 cond.end: ; preds = %cond.else, %cond.then
30 %cond = phi i32 [ %tmp10, %cond.then ], [ %tmp12, %cond.else ]
33 br i1 %tobool15, label %cond.else17, label %cond.then16
35 cond.then16: ; preds = %cond.end
[all …]
/external/llvm/test/Transforms/SimplifyCFG/AMDGPU/
Dcttz-ctlz.ll13 br i1 %tobool, label %cond.end, label %cond.true
15 cond.true: ; preds = %entry
17 br label %cond.end
19 cond.end: ; preds = %entry, %cond.true
20 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
21 ret i64 %cond
33 br i1 %tobool, label %cond.end, label %cond.true
35 cond.true: ; preds = %entry
37 br label %cond.end
39 cond.end: ; preds = %entry, %cond.true
[all …]
/external/valgrind/drd/
Ddrd_cond.c61 void DRD_(cond_initialize)(struct cond_info* const p, const Addr cond) in DRD_()
63 tl_assert(cond != 0); in DRD_()
64 tl_assert(p->a1 == cond); in DRD_()
118 static struct cond_info* cond_get_or_allocate(const Addr cond) in cond_get_or_allocate() argument
122 tl_assert(offsetof(DrdClientobj, cond) == 0); in cond_get_or_allocate()
123 p = &(DRD_(clientobj_get)(cond, ClientCondvar)->cond); in cond_get_or_allocate()
127 if (DRD_(clientobj_present)(cond, cond + 1)) in cond_get_or_allocate()
129 wrong_type(cond); in cond_get_or_allocate()
133 p = &(DRD_(clientobj_add)(cond, ClientCondvar)->cond); in cond_get_or_allocate()
134 DRD_(cond_initialize)(p, cond); in cond_get_or_allocate()
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/external/llvm/test/Transforms/SimplifyCFG/X86/
Dspeculate-cttz-ctlz.ll14 br i1 %tobool, label %cond.end, label %cond.true
16 cond.true: ; preds = %entry
18 br label %cond.end
20 cond.end: ; preds = %entry, %cond.true
21 %cond = phi i64 [ %0, %cond.true ], [ 64, %entry ]
22 ret i64 %cond
33 br i1 %tobool, label %cond.end, label %cond.true
35 cond.true: ; preds = %entry
37 br label %cond.end
39 cond.end: ; preds = %entry, %cond.true
[all …]
/external/llvm/test/Transforms/IndVarSimplify/
Dpr25047.ll9 br i1 %c0, label %for.end.34, label %for.cond.1thread-pre-split
11 for.cond.loopexit: ; preds = %for.end.29, %for.end.7
13 br i1 %c1, label %for.end.34, label %for.cond.1thread-pre-split
15 for.cond.1thread-pre-split: ; preds = %for.cond.loopexit, %entry
16 %f.047 = phi i32 [ %f.lcssa, %for.cond.loopexit ], [ 0, %entry ]
17 br label %for.cond.1
19 for.cond.1: ; preds = %for.cond.1, %for.cond.1thread-pre-split
20 br i1 %c1, label %for.cond.4, label %for.cond.1
22 for.cond.4: ; preds = %for.end.29, %for.cond.1
23 %f.1 = phi i32 [ 0, %for.end.29 ], [ %f.047, %for.cond.1 ]
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/LoopDeletion/
D2011-06-21-phioperands.ll24 br label %for.cond.i14.us
26 for.cond.i14.us: ; preds = %for.inc.i38.us, %entry.split.us
27 br i1 true, label %for.cond.i50.us-lcssa.us, label %if.end.i23.us
30 br label %for.cond.i14.us
32 if.end.i23.us: ; preds = %for.cond.i14.us
33 br i1 true, label %for.cond.i50.us-lcssa.us, label %for.inc.i38.us
35 for.cond.i50.us-lcssa.us: ; preds = %if.end.i23.us, %for.cond.i14.us
36 br label %for.cond.i50
39 br label %for.cond.i14
41 for.cond.i14: ; preds = %for.inc.i38, %entry.split
[all …]
/external/llvm/test/Transforms/LoopDeletion/
D2011-06-21-phioperands.ll24 br label %for.cond.i14.us
26 for.cond.i14.us: ; preds = %for.inc.i38.us, %entry.split.us
27 br i1 true, label %for.cond.i50.us-lcssa.us, label %if.end.i23.us
30 br label %for.cond.i14.us
32 if.end.i23.us: ; preds = %for.cond.i14.us
33 br i1 true, label %for.cond.i50.us-lcssa.us, label %for.inc.i38.us
35 for.cond.i50.us-lcssa.us: ; preds = %if.end.i23.us, %for.cond.i14.us
36 br label %for.cond.i50
39 br label %for.cond.i14
41 for.cond.i14: ; preds = %for.inc.i38, %entry.split
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/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h450 void and_(Register rd, Register rn, Operand o, Condition cond = AL);
453 void eor(Register rd, Register rn, Operand o, Condition cond = AL);
456 void sub(Register rd, Register rn, Operand o, Condition cond = AL);
457 void subs(Register rd, Register rn, Operand o, Condition cond = AL);
460 void rsb(Register rd, Register rn, Operand o, Condition cond = AL);
461 void rsbs(Register rd, Register rn, Operand o, Condition cond = AL);
464 void add(Register rd, Register rn, Operand o, Condition cond = AL);
466 void adds(Register rd, Register rn, Operand o, Condition cond = AL);
469 void adc(Register rd, Register rn, Operand o, Condition cond = AL);
471 void adcs(Register rd, Register rn, Operand o, Condition cond = AL);
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/external/swiftshader/third_party/subzero/crosstest/
Dtest_select.ll1 define <4 x float> @_Z6selectDv4_iDv4_fS0_(<4 x i32> %cond.ext, <4 x float> %arg1, <4 x float> %arg…
3 %cond = trunc <4 x i32> %cond.ext to <4 x i1>
4 %res = select <4 x i1> %cond, <4 x float> %arg1, <4 x float> %arg2
8 define <4 x i32> @_Z6selectDv4_iS_S_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x i32> %arg2) {
10 %cond = trunc <4 x i32> %cond.ext to <4 x i1>
11 %res = select <4 x i1> %cond, <4 x i32> %arg1, <4 x i32> %arg2
15 define <4 x i32> @_Z6selectDv4_iDv4_jS0_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x i32> %arg2) {
17 %cond = trunc <4 x i32> %cond.ext to <4 x i1>
18 %res = select <4 x i1> %cond, <4 x i32> %arg1, <4 x i32> %arg2
22 define <8 x i16> @_Z6selectDv8_sS_S_(<8 x i16> %cond.ext, <8 x i16> %arg1, <8 x i16> %arg2) {
[all …]
/external/llvm/test/Transforms/CorrelatedValuePropagation/
D2010-09-26-MergeConstantRange.ll11 br label %for.cond.outer
13 for.cond.outer: ; preds = %for.cond.loopexit, %entry
14 br label %for.cond
16 for.cond.loopexit: ; preds = %bb.nph, %for.cond9.preheader
17 br label %for.cond.outer
19 for.cond.loopexit4.us-lcssa: ; preds = %if.then
20 br label %for.cond.loopexit4
22 for.cond.loopexit4: ; preds = %for.cond.loopexit4.us-lcssa.us, %for.c…
23 br label %for.cond.backedge
25 for.cond: ; preds = %for.cond.backedge, %for.cond.outer
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