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/external/icu/android_icu4j/src/main/java/android/icu/impl/coll/
DBOCSU.java295 long division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff() local
296 int modulo = (int)division; in writeDiff()
298 diff = (int)(division >> 32); in writeDiff()
304 diff = (int)(division >> 32); in writeDiff()
305 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
306 modulo = (int)division; in writeDiff()
307 diff = (int)(division >> 32); in writeDiff()
314 diff = (int)(division >> 32); in writeDiff()
315 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
316 modulo = (int)division; in writeDiff()
[all …]
/external/icu/icu4j/main/classes/collate/src/com/ibm/icu/impl/coll/
DBOCSU.java294 long division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff() local
295 int modulo = (int)division; in writeDiff()
297 diff = (int)(division >> 32); in writeDiff()
303 diff = (int)(division >> 32); in writeDiff()
304 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
305 modulo = (int)division; in writeDiff()
306 diff = (int)(division >> 32); in writeDiff()
313 diff = (int)(division >> 32); in writeDiff()
314 division = getNegDivMod(diff, SLOPE_TAIL_COUNT_); in writeDiff()
315 modulo = (int)division; in writeDiff()
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dvec-div-01.ll1 ; Test vector division. There is no native integer support for this,
6 ; Test a v16i8 division.
29 ; Test a v8i16 division.
44 ; Test a v4i32 division.
55 ; Test a v2i64 division.
64 ; Test a v2f64 division.
74 ; Test an f64 division that uses vector registers.
Dint-div-06.ll5 ; Check signed 32-bit division.
18 ; Check unsigned 32-bit division.
29 ; Check signed 64-bit division.
46 ; Check unsigned 64-bit division.
Dint-div-03.ll1 ; Test 64-bit signed division and remainder when the divisor is
8 ; Test register division. The result is in the second of the two registers.
34 ; Test that division and remainder use a single instruction.
48 ; Test register division when the dividend is zero rather than sign extended.
71 ; Test memory division with no displacement.
99 ; Test both memory division and memory remainder.
194 ; a load and division cannot be combined.
Dfp-div-03.ll1 ; Test 128-bit floating-point division.
5 ; There is no memory form of 128-bit division.
Dint-div-01.ll1 ; Test 32-bit signed division and remainder.
7 ; Test register division. The result is in the second of the two registers.
31 ; Test that division and remainder use a single instruction.
79 ; Test memory division with no displacement.
105 ; Test both memory division and memory remainder.
195 ; a load and division cannot be combined.
Dint-div-04.ll1 ; Testg 64-bit signed division and remainder.
7 ; Testg register division. The result is in the second of the two registers.
31 ; Testg that division and remainder use a single instruction.
45 ; Testg memory division with no displacement.
71 ; Testg both memory division and memory remainder.
Dint-div-05.ll1 ; Testg 64-bit unsigned division and remainder.
7 ; Testg register division. The result is in the second of the two registers.
35 ; Testg that division and remainder use a single instruction.
51 ; Testg memory division with no displacement.
81 ; Testg both memory division and memory remainder.
Dint-div-02.ll1 ; Test 32-bit unsigned division and remainder.
7 ; Test register division. The result is in the second of the two registers.
35 ; Test that division and remainder use a single instruction.
51 ; Test memory division with no displacement.
81 ; Test both memory division and memory remainder.
/external/llvm/test/CodeGen/X86/
Dfdiv-combine.ll3 ; More than one 'arcp' division using a single divisor operand
6 ; Don't do anything for just one division.
34 ; The first division is not 'arcp', so do not optimize.
49 ; The second division is not 'arcp', so do not optimize.
Dfdiv.ll5 ; Exact division by a constant converted to multiplication.
15 ; Inexact division by a constant converted to multiplication.
/external/bison/m4/
Dfpieee.m411 dnl - The overflow and division by zero behaviour: The result are values
21 dnl floating-point division by zero.
22 dnl (For integer overflow, see gcc's -ftrapv option; for integer division by
/external/llvm/test/Transforms/IndVarSimplify/
Dlftr-udiv-tripcount.ll6 ; division because in this case the division can be optimized to a
/external/swiftshader/third_party/LLVM/test/Transforms/InstSimplify/
Dreassociate.ll124 ; (X / Y) * Y -> X if the division is exact
133 ; Y * (X / Y) -> X if the division is exact
171 ; (X / Y) * Y -> X if the division is exact
180 ; Y * (X / Y) -> X if the division is exact
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DREADME.txt18 2. Libcalls: multiplication, division, remainder. Note, that calling convention
22 3. Implement multiplication / division by constant (dag combiner hook?).
/external/llvm/lib/Target/MSP430/
DREADME.txt18 2. Libcalls: multiplication, division, remainder. Note, that calling convention
22 3. Implement multiplication / division by constant (dag combiner hook?).
/external/v8/
DAndroid.base.mk12 src/base/division-by-constant.cc \
39 src/base/division-by-constant.cc \
/external/llvm/test/CodeGen/Mips/
Ddivrem.ll8 ; RUN: llc -march=mips -mcpu=mips32 -mno-check-zero-division -relocation-model=pic < %s | FileC…
9 ; RUN: llc -march=mips -mcpu=mips32r2 -mno-check-zero-division -relocation-model=pic < %s | FileC…
10 ; RUN: llc -march=mips -mcpu=mips32r6 -mno-check-zero-division -relocation-model=pic < %s | FileC…
11 ; RUN: llc -march=mips64 -mcpu=mips64 -mno-check-zero-division -relocation-model=pic < %s | FileC…
12 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mno-check-zero-division -relocation-model=pic < %s | FileC…
13 ; RUN: llc -march=mips64 -mcpu=mips64r6 -mno-check-zero-division -relocation-model=pic < %s | FileC…
/external/llvm/test/Transforms/InstSimplify/
Dreassociate.ll145 ; (X / Y) * Y -> X if the division is exact
155 ; Y * (X / Y) -> X if the division is exact
198 ; (X / Y) * Y -> X if the division is exact
208 ; Y * (X / Y) -> X if the division is exact
/external/mesa3d/src/compiler/glsl/glcpp/tests/
D093-divide-by-zero.c.expected1 0:1(12): preprocessor error: division by 0 in preprocessor directive
D094-divide-by-zero-short-circuit.c.expected1 0:12(17): preprocessor error: division by 0 in preprocessor directive
/external/llvm/test/Transforms/LoopUnroll/
Dhigh-cost-trip-count-computation.ll27 ;; Though SCEV for loop tripcount contains division,
28 ;; it shouldn't be considered expensive, since the division already
/external/llvm/test/CodeGen/BPF/
Dsdiv_error.ll3 ; CHECK: Unsupport signed division
/external/python/cpython2/Lib/test/
Dtest_future3.py2 from __future__ import division

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