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Searched refs:dsrav (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/test/CodeGen/Mips/llvm-ir/
Dashr.ll129 ; GP64: dsrav $2, $4, $5
168 ; M3: dsrav $[[T1:[0-9]+]], $4, $7
191 ; GP64-NOT-R6: dsrav $2, $4, $7
198 ; 64R6: dsrav $[[T0:[0-9]+]], $4, $7
/external/valgrind/none/tests/mips64/
Dshift_instructions.stdout.exp-mips648705 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
8706 dsrav $s0, $s1, $s2 :: rd 0x0, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
8707 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
8708 dsrav $s0, $s1, $s2 :: rd 0xfd0, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
8709 dsrav $t0, $t1, $t2 :: rd 0x2, rs 0x9823b6e, rt 0xffffffffb8757bda
8710 dsrav $s0, $s1, $s2 :: rd 0xfffffffffffffcbb, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
8711 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0xd4326d9, rt 0xffffffffbcb4666d
8712 dsrav $s0, $s1, $s2 :: rd 0xfffffffffeddd1b5, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
8713 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x130476dc, rt 0xffffffffa2f33668
8714 dsrav $s0, $s1, $s2 :: rd 0x856181450c, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17
[all …]
Dshift_instructions.stdout.exp-mips64r213313 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
13314 dsrav $s0, $s1, $s2 :: rd 0x0, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
13315 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
13316 dsrav $s0, $s1, $s2 :: rd 0xfd0, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
13317 dsrav $t0, $t1, $t2 :: rd 0x2, rs 0x9823b6e, rt 0xffffffffb8757bda
13318 dsrav $s0, $s1, $s2 :: rd 0xfffffffffffffcbb, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
13319 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0xd4326d9, rt 0xffffffffbcb4666d
13320 dsrav $s0, $s1, $s2 :: rd 0xfffffffffeddd1b5, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
13321 dsrav $t0, $t1, $t2 :: rd 0x0, rs 0x130476dc, rt 0xffffffffa2f33668
13322 dsrav $s0, $s1, $s2 :: rd 0x856181450c, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17
[all …]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s91 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
94 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
Dmips64shift.ll12 ; CHECK: dsrav
/external/llvm/test/CodeGen/Mips/
Dmips64shift.ll13 ; ALL: dsrav
/external/llvm/test/MC/Mips/mips5/
Dvalid.s95 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
98 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Mips/mips4/
Dvalid.s95 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
98 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Mips/mips64/
Dvalid.s102 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
105 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s111 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
114 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s111 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
114 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s111 …dsra $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
114 …dsrav $gp,$s2,$s3 # CHECK: dsrav $gp, $18, $19 # encoding: [0x02,0x72,0xe0,0x…
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-el.txt99 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
102 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
234 0x17 0x08 0xc1 0x03 # CHECK: dsrav $1, $1, $fp
Dvalid-mips64.txt114 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
115 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
139 0x03 0xc1 0x08 0x17 # CHECK: dsrav $1, $1, $fp
/external/llvm/test/MC/Disassembler/Mips/mips64r2/
Dvalid-mips64r2-el.txt105 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
108 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
255 0x17 0x08 0xc1 0x03 # CHECK: dsrav $1, $1, $fp
/external/llvm/test/MC/Disassembler/Mips/mips3/
Dvalid-mips3-el.txt81 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
84 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
Dvalid-mips3.txt80 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
81 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
/external/llvm/test/MC/Disassembler/Mips/mips4/
Dvalid-mips4-el.txt85 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
88 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
Dvalid-mips4.txt82 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
83 0x02 0x72 0xe0 0x17 # CHECK: dsrav $gp, $18, $19
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-mips64r5-el.txt102 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
105 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
/external/llvm/test/MC/Disassembler/Mips/mips64r3/
Dvalid-mips64r3-el.txt102 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
105 0x17 0xe0 0x72 0x02 # CHECK: dsrav $gp, $18, $19
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips3.s39 …dsrav $gp,$s2,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
/external/llvm/lib/Target/Mips/
DMicroMips64r6InstrInfo.td55 class DSRAV_MM64R6_ENC : POOL32S_3R_FM_MMR6<"dsrav", 0b010010000>;
254 class DSRAV_MM64R6_DESC : SHIFT_ROTATE_REG_MM64R6<"dsrav", II_DSRAV, sra>;
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMips64InstrInfo.td124 def DSRAV : LogicR_shift_rotate_reg64<0x27, 0x00, "dsrav", sra>;
/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s279 dsrav $4, $5, $6 # CHECK: dsrav $4, $5, $6 # encoding: [0x58,0xa6,0x20,0x90]

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