| /external/swiftshader/third_party/LLVM/lib/Target/ |
| D | TargetSubtargetInfo.cpp | 25 bool TargetSubtargetInfo::enablePostRAScheduler( in enablePostRAScheduler() function in TargetSubtargetInfo
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| /external/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 107 bool enablePostRAScheduler(
266 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
278 return ST.enablePostRAScheduler() && in enablePostRAScheduler()
299 if (!enablePostRAScheduler(Fn.getSubtarget(), PassConfig->getOptLevel(), in runOnMachineFunction()
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| D | MachineScheduler.cpp | 372 } else if (!mf.getSubtarget().enablePostRAScheduler()) { in runOnMachineFunction()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSubtargetInfo.h | 57 virtual bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUSubtarget.h | 91 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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| D | SPUSubtarget.cpp | 50 bool SPUSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in SPUSubtarget
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| /external/llvm/lib/Target/ |
| D | TargetSubtargetInfo.cpp | 48 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeSubtarget.h | 57 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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| D | MBlazeSubtarget.cpp | 56 enablePostRAScheduler(CodeGenOpt::Level OptLevel, in enablePostRAScheduler() function in MBlazeSubtarget
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.h | 109 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
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| /external/llvm/include/llvm/Target/ |
| D | TargetSubtargetInfo.h | 145 virtual bool enablePostRAScheduler() const;
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMSubtarget.h | 251 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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| D | ARMSubtarget.cpp | 211 bool ARMSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in ARMSubtarget
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 134 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
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| D | MipsSubtarget.h | 166 bool enablePostRAScheduler() const override;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 189 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
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| D | PPCSubtarget.h | 301 bool enablePostRAScheduler() const override;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64Subtarget.h | 153 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 295 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
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| D | ARMSubtarget.h | 591 bool enablePostRAScheduler() const override;
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 224 if (!ST.enablePostRAScheduler(OptLevel, AntiDepMode, CriticalPathRCs)) in runOnMachineFunction()
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