| /external/llvm/test/MC/Sparc/ |
| D | sparc-vis.s | 3 ! CHECK: fzeros %f31 ! encoding: [0xbf,0xb0,0x0c,0x20]
4 fzeros %f31
|
| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-xfail.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
44 0x46 0xce 0xfe 0x3a # CHECK: c.seq.ps $fcc6, $f31, $f14
55 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
58 0x46 0xd3 0xff 0xd3 # CHECK: movn.ps $f31, $f31, $19
61 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
|
| /external/llvm/test/MC/Disassembler/Mips/mips4/ |
| D | valid-xfail-mips4.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
32 0x4f 0xf9 0x98 0x60 # CHECK: madd.s $f1, $f31, $f19, $f25
33 0x4c 0x32 0xfa 0xa9 # CHECK: msub.d $f10, $f1, $f31, $f18
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/include/ |
| D | fpu_asm.h | 15 stfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
35 lfd f31,(stack_size + STACK_FRAME_MIN_SIZE)(%r1); \
76 lfd f31,136(r3)
|
| /external/llvm/test/MC/Mips/ |
| D | mips-reginfo-fp32.s | 33 # abs.d - Reads from $f30 and $f31 and writes to $f30 and $f31.
|
| /external/llvm/test/MC/Disassembler/Mips/mips32/ |
| D | valid-xfail-mips32.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | vsx-spill.ll | 10 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
31 …19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() nounwind
51 …0},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31},~{v0},~{v1},~{v2},…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips32r2.s | 9 …madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
10 …msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| D | invalid-mips5-wrong-error.s | 22 c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
34 movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips5-wrong-error.s | 25 … c.seq.ps $fcc6,$f31,$f14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
36 … movn.ps $f31,$f31,$s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
|
| /external/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg-msa.ll | 26 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
60 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
90 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
118 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
|
| D | no-odd-spreg.ll | 24 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
48 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
|
| /external/llvm/test/CodeGen/Mips/cconv/ |
| D | callee-saved-float.ll | 28 …,~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
72 ; O32-INV-NOT: sdc1 $f31,
91 ; N32-INV-NOT: sdc1 $f31,
104 ; N64-DAG: sdc1 [[F31:\$f31]], [[OFF31:[0-9]+]]($sp)
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| D | valid-xfail-mips32r5.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
82 0x46 0x00 0xff 0x09 # CHECK: trunc.l.s $f28, $f31
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| D | valid-xfail-mips32r3.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
82 0x46 0x00 0xff 0x09 # CHECK: trunc.l.s $f28, $f31
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| D | valid-xfail-mips32r2.txt | 13 0x46 0x17 0xfa 0x3b # CHECK: c.ngl.s $fcc2, $f31, $f23
17 0x46 0x3f 0x82 0x36 # CHECK: c.ole.d $fcc2, $f16, $f31
21 0x46 0x27 0xfc 0x3a # CHECK: c.seq.d $fcc4, $f31, $f7
82 0x46 0x00 0xff 0x09 # CHECK: trunc.l.s $f28, $f31
|
| /external/llvm/test/tools/llvm-objdump/X86/ |
| D | macho-disassembly-stripped.test | 5 CHECK: 0000000100000f31 movq %rsp, %rbp
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| D | invalid.s | 218 bc1eqzc $f31, -65535 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
219 bc1eqzc $f31, -65537 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
220 bc1eqzc $f31, 65535 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
221 bc1eqzc $f31, 65536 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
223 bc1nezc $f31, -65535 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
224 bc1nezc $f31, -65537 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
225 bc1nezc $f31, 65535 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
226 bc1nezc $f31, 65536 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
|
| /external/linux-kselftest/tools/testing/selftests/powerpc/math/ |
| D | fpu_asm.S | 68 fcmpu cr1,f0,f31
76 # f14-f31 are non volatiles
|
| /external/libjpeg-turbo/simd/ |
| D | jsimd_mips_dspr2_asm.h | 90 #define f31 $f31 macro
|
| /external/compiler-rt/lib/builtins/ppc/ |
| D | restFP.S | 40 lfd f31,-8(r1)
|
| D | saveFP.S | 38 stfd f31,-8(r1)
|