| /external/llvm/test/MC/ARM/ |
| D | neon-v8.s | 3 vmaxnm.f32 d4, d5, d1
4 @ CHECK: vmaxnm.f32 d4, d5, d1 @ encoding: [0x11,0x4f,0x05,0xf3]
5 vmaxnm.f32 q2, q4, q6
6 @ CHECK: vmaxnm.f32 q2, q4, q6 @ encoding: [0x5c,0x4f,0x08,0xf3]
7 vminnm.f32 d5, d4, d30
8 @ CHECK: vminnm.f32 d5, d4, d30 @ encoding: [0x3e,0x5f,0x24,0xf3]
9 vminnm.f32 q0, q13, q2
10 @ CHECK: vminnm.f32 q0, q13, q2 @ encoding: [0xd4,0x0f,0x2a,0xf3]
12 vcvta.s32.f32 d4, d6
13 @ CHECK: vcvta.s32.f32 d4, d6 @ encoding: [0x06,0x40,0xbb,0xf3]
[all …]
|
| D | thumb-neon-v8.s | 3 vmaxnm.f32 d4, d5, d1
4 @ CHECK: vmaxnm.f32 d4, d5, d1 @ encoding: [0x05,0xff,0x11,0x4f]
5 vmaxnm.f32 q2, q4, q6
6 @ CHECK: vmaxnm.f32 q2, q4, q6 @ encoding: [0x08,0xff,0x5c,0x4f]
7 vminnm.f32 d5, d4, d30
8 @ CHECK: vminnm.f32 d5, d4, d30 @ encoding: [0x24,0xff,0x3e,0x5f]
9 vminnm.f32 q0, q13, q2
10 @ CHECK: vminnm.f32 q0, q13, q2 @ encoding: [0x2a,0xff,0xd4,0x0f]
12 vcvta.s32.f32 d4, d6
13 @ CHECK: vcvta.s32.f32 d4, d6 @ encoding: [0xbb,0xff,0x06,0x40]
[all …]
|
| D | neon-convert-encoding.s | 3 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3]
4 vcvt.s32.f32 d16, d16
5 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xf3]
6 vcvt.u32.f32 d16, d16
7 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3]
8 vcvt.f32.s32 d16, d16
9 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xf3]
10 vcvt.f32.u32 d16, d16
11 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3]
12 vcvt.s32.f32 q8, q8
[all …]
|
| D | neont2-convert-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07]
8 vcvt.u32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06]
12 vcvt.f32.u32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
[all …]
|
| D | neont2-cmp-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07]
8 vcvt.u32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06]
12 vcvt.f32.u32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
[all …]
|
| D | thumb-fp-armv8.s | 31 vcvta.s32.f32 s2, s3
32 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
35 vcvtn.s32.f32 s6, s23
36 @ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xbd,0xfe,0xeb,0x3a]
39 vcvtp.s32.f32 s0, s4
40 @ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xbe,0xfe,0xc2,0x0a]
43 vcvtm.s32.f32 s17, s8
44 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a]
48 vcvta.u32.f32 s2, s3
49 @ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0xbc,0xfe,0x61,0x1a]
[all …]
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| D | fp-armv8.s | 28 vcvta.s32.f32 s2, s3
29 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xe1,0x1a,0xbc,0xfe]
32 vcvtn.s32.f32 s6, s23
33 @ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xeb,0x3a,0xbd,0xfe]
36 vcvtp.s32.f32 s0, s4
37 @ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xc2,0x0a,0xbe,0xfe]
40 vcvtm.s32.f32 s17, s8
41 @ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe]
45 vcvta.u32.f32 s2, s3
46 @ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0x61,0x1a,0xbc,0xfe]
[all …]
|
| D | vfp4.s | 13 @ ARM: vfma.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0xa2,0xee]
14 @ THUMB: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a]
15 @ THUMB_V7EM: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a]
16 vfma.f32 s2, s4, s0
18 @ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2]
19 @ THUMB: vfma.f32 d16, d18, d17 @ encoding: [0x42,0xef,0xb1,0x0c]
21 @ THUMB_V7EM-ERRORS-NEXT: vfma.f32 d16, d18, d17
22 vfma.f32 d16, d18, d17
24 @ ARM: vfma.f32 q2, q4, q0 @ encoding: [0x50,0x4c,0x08,0xf2]
25 @ THUMB: vfma.f32 q2, q4, q0 @ encoding: [0x08,0xef,0x50,0x4c]
[all …]
|
| D | directive-arch_extension-simd.s | 19 vmaxnm.f32 s0, s0, s0
21 vminnm.f32 s0, s0, s0
29 vcvta.s32.f32 s0, s0
31 vcvta.u32.f32 s0, s0
37 vcvtn.s32.f32 s0, s0
39 vcvtn.u32.f32 s0, s0
45 vcvtp.s32.f32 s0, s0
47 vcvtp.u32.f32 s0, s0
53 vcvtm.s32.f32 s0, s0
55 vcvtm.u32.f32 s0, s0
[all …]
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| D | directive-arch_extension-fp.s | 22 vselgt.f32 s0, s0, s0
24 vselge.f32 s0, s0, s0
26 vseleq.f32 s0, s0, s0
28 vselvs.f32 s0, s0, s0
30 vmaxnm.f32 s0, s0, s0
32 vminnm.f32 s0, s0, s0
57 vcvta.s32.f32 s0, s0
59 vcvta.u32.f32 s0, s0
65 vcvtn.s32.f32 s0, s0
67 vcvtn.u32.f32 s0, s0
[all …]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | neon-convert-encoding.s | 3 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3]
4 vcvt.s32.f32 d16, d16
5 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xa0,0x07,0xfb,0xf3]
6 vcvt.u32.f32 d16, d16
7 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0x20,0x06,0xfb,0xf3]
8 vcvt.f32.s32 d16, d16
9 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xa0,0x06,0xfb,0xf3]
10 vcvt.f32.u32 d16, d16
11 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0x60,0x07,0xfb,0xf3]
12 vcvt.s32.f32 q8, q8
[all …]
|
| D | neont2-convert-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07]
8 vcvt.u32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06]
12 vcvt.f32.u32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
[all …]
|
| D | neont2-cmp-encoding.s | 5 @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x07]
6 vcvt.s32.f32 d16, d16
7 @ CHECK: vcvt.u32.f32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x07]
8 vcvt.u32.f32 d16, d16
9 @ CHECK: vcvt.f32.s32 d16, d16 @ encoding: [0xfb,0xff,0x20,0x06]
10 vcvt.f32.s32 d16, d16
11 @ CHECK: vcvt.f32.u32 d16, d16 @ encoding: [0xfb,0xff,0xa0,0x06]
12 vcvt.f32.u32 d16, d16
13 @ CHECK: vcvt.s32.f32 q8, q8 @ encoding: [0xfb,0xff,0x60,0x07]
14 vcvt.s32.f32 q8, q8
[all …]
|
| /external/clang/test/CodeGen/ |
| D | tbaa.cpp | 16 uint32_t f32; member
24 uint32_t f32; member
30 uint32_t f32; member
36 uint32_t f32; member
43 uint32_t f32; member
48 uint32_t f32; member
59 A->f32 = 4; in g()
82 A->f32 = 1; in g3()
83 B->a.f32 = 4; in g3()
84 return A->f32; in g3()
[all …]
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| D | tbaa-class.cpp | 13 uint32_t f32; member in StructA
22 uint32_t f32; member in StructB
29 uint32_t f32; member in StructC
36 uint32_t f32; member in StructD
44 uint32_t f32; member in StructS
61 A->f32 = 4; in g()
84 A->f32 = 1; in g3()
85 B->a.f32 = 4; in g3()
86 return A->f32; in g3()
96 A->f32 = 1; in g4()
[all …]
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| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | fp.arm.call.ll | 65 ; CHECK-DAG: vmov.f32 s0
68 ; CHECK-DAG: vmov.f32 s0
69 ; CHECK-DAG: vmov.f32 s1
72 ; CHECK-DAG: vmov.f32 s0
73 ; CHECK-DAG: vmov.f32 s1
74 ; CHECK-DAG: vmov.f32 s2
77 ; CHECK-DAG: vmov.f32 s0
78 ; CHECK-DAG: vmov.f32 s1
79 ; CHECK-DAG: vmov.f32 s2
80 ; CHECK-DAG: vmov.f32 s3
[all …]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb-neon-v8.txt | 4 # CHECK: vmaxnm.f32 d4, d5, d1
6 # CHECK: vmaxnm.f32 q2, q4, q6
8 # CHECK: vminnm.f32 d5, d4, d30
10 # CHECK: vminnm.f32 q0, q13, q2
13 # CHECK: vcvta.s32.f32 d4, d6
15 # CHECK: vcvta.u32.f32 d12, d10
17 # CHECK: vcvta.s32.f32 q4, q6
19 # CHECK: vcvta.u32.f32 q4, q10
22 # CHECK: vcvtm.s32.f32 d1, d30
24 # CHECK: vcvtm.u32.f32 d12, d10
[all …]
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| D | neon-v8.txt | 4 # CHECK: vmaxnm.f32 d4, d5, d1
6 # CHECK: vmaxnm.f32 q2, q4, q6
8 # CHECK: vminnm.f32 d5, d4, d30
10 # CHECK: vminnm.f32 q0, q13, q2
13 # CHECK: vcvta.s32.f32 d4, d6
15 # CHECK: vcvta.u32.f32 d12, d10
17 # CHECK: vcvta.s32.f32 q4, q6
19 # CHECK: vcvta.u32.f32 q4, q10
22 # CHECK: vcvtm.s32.f32 d1, d30
24 # CHECK: vcvtm.u32.f32 d12, d10
[all …]
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_half.h | 55 union fi f32; in util_float_to_half() local
60 f32.f = f; in util_float_to_half()
63 sign = f32.ui & sign_mask; in util_float_to_half()
64 f32.ui ^= sign; in util_float_to_half()
66 if (f32.ui == f32inf) { in util_float_to_half()
69 } else if (f32.ui > f32inf) { in util_float_to_half()
74 f32.ui &= round_mask; in util_float_to_half()
75 f32.f *= magic.f; in util_float_to_half()
76 f32.ui -= round_mask; in util_float_to_half()
91 if (f32.ui > f16inf) in util_float_to_half()
[all …]
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| /external/llvm/test/Transforms/LICM/ |
| D | hoist-round.ll | 11 ; CHECK: call float @llvm.ceil.f32
12 ; CHECK: call float @llvm.floor.f32
13 ; CHECK: call float @llvm.nearbyint.f32
14 ; CHECK: call float @llvm.rint.f32
15 ; CHECK: call float @llvm.round.f32
16 ; CHECK: call float @llvm.trunc.f32
17 ; CHECK: call float @llvm.fabs.f32
18 ; CHECK: call float @llvm.copysign.f32
19 ; CHECK: call float @llvm.minnum.f32
20 ; CHECK: call float @llvm.maxnum.f32
[all …]
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | float-intrinsics-float.ll | 8 declare float @llvm.sqrt.f32(float %Val)
12 ; HARD: vsqrt.f32 s0, s0
13 %1 = call float @llvm.sqrt.f32(float %a)
17 declare float @llvm.powi.f32(float %Val, i32 %power)
22 %1 = call float @llvm.powi.f32(float %a, i32 %b)
26 declare float @llvm.sin.f32(float %Val)
31 %1 = call float @llvm.sin.f32(float %a)
35 declare float @llvm.cos.f32(float %Val)
40 %1 = call float @llvm.cos.f32(float %a)
44 declare float @llvm.pow.f32(float %Val, float %power)
[all …]
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| /external/mesa3d/src/util/ |
| D | format_r11g11b10f.h | 55 } f32 = {val}; in f32_to_uf11() local
60 int sign = (f32.ui >> 16) & 0x8000; in f32_to_uf11()
62 int exponent = ((f32.ui >> 23) & 0xff) - 127; in f32_to_uf11()
63 int mantissa = f32.ui & 0x007fffff; in f32_to_uf11()
103 } f32; in uf11_to_f32() local
108 f32.f = 0.0; in uf11_to_f32()
113 f32.f = scale * mantissa; in uf11_to_f32()
116 f32.ui = F32_INFINITY | mantissa; in uf11_to_f32()
126 f32.f = scale * decimal; in uf11_to_f32()
129 return f32.f; in uf11_to_f32()
[all …]
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| /external/llvm/test/CodeGen/WebAssembly/ |
| D | comparisons_f32.ll | 10 ; CHECK-NEXT: .param f32, f32{{$}}
12 ; CHECK-NEXT: f32.eq $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
13 ; CHECK-NEXT: f32.eq $push[[NUM1:[0-9]+]]=, $1, $1{{$}}
23 ; CHECK-NEXT: .param f32, f32{{$}}
25 ; CHECK-NEXT: f32.ne $push[[NUM0:[0-9]+]]=, $0, $0{{$}}
26 ; CHECK-NEXT: f32.ne $push[[NUM1:[0-9]+]]=, $1, $1{{$}}
36 ; CHECK-NEXT: .param f32, f32{{$}}
38 ; CHECK-NEXT: f32.eq $push[[NUM:[0-9]+]]=, $0, $1{{$}}
47 ; CHECK: f32.ne $push[[NUM:[0-9]+]]=, $0, $1{{$}}
56 ; CHECK: f32.lt $push[[NUM:[0-9]+]]=, $0, $1{{$}}
[all …]
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| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | fmacs.ll | 10 ; VFP2: vmla.f32
13 ; NEON: vmla.f32
16 ; A8: vmul.f32
17 ; A8: vadd.f32
42 ; VFP2: vmla.f32
45 ; NEON: vmla.f32
48 ; A8: vmul.f32
49 ; A8: vadd.f32
60 ; A8: vmul.f32
61 ; A8: vmul.f32
[all …]
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| /external/llvm/test/CodeGen/ARM/ |
| D | fmacs.ll | 10 ; VFP2: vmla.f32
13 ; NEON: vmla.f32
16 ; A8: vmul.f32
17 ; A8: vadd.f32
42 ; VFP2: vmla.f32
45 ; NEON: vmla.f32
48 ; A8: vmul.f32
49 ; A8: vadd.f32
60 ; A8: vmul.f32
61 ; A8: vmul.f32
[all …]
|