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Searched refs:fca (Results 1 – 25 of 36) sorted by relevance

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/external/syslinux/com32/lib/sys/
Dgpxe.c10 struct s_PXENV_FILE_CHECK_API *fca; in is_gpxe() local
18 fca = lzalloc(sizeof *fca); in is_gpxe()
19 if (!fca) in is_gpxe()
22 fca->Size = sizeof *fca; in is_gpxe()
23 fca->Magic = 0x91d447b2; in is_gpxe()
25 err = pxe_call(PXENV_FILE_API_CHECK, fca); in is_gpxe()
32 if (fca->Status) in is_gpxe()
35 if (fca->Magic != 0xe9c17b20) in is_gpxe()
38 if (fca->Size < sizeof *fca) in is_gpxe()
42 if (!(fca->APIMask & (1 << 5))) in is_gpxe()
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/external/llvm/test/Transforms/GVN/
Dbig-endian.ll14 %valueLoadA.fca.0.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predA, i64 0, i32 0
15 %valueLoadA.fca.0.load = load i1, i1* %valueLoadA.fca.0.gep, align 8
16 %valueLoadB.fca.0.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predB, i64 0, i32 0
17 %valueLoadB.fca.0.load = load i1, i1* %valueLoadB.fca.0.gep, align 8
18 %isTrue = and i1 %valueLoadA.fca.0.load, %valueLoadB.fca.0.load
19 %valueLoadA.fca.1.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predA, i64 0, i32 1
20 %valueLoadA.fca.1.load = load i8, i8* %valueLoadA.fca.1.gep, align 1
21 %isNotNullA = icmp ne i8 %valueLoadA.fca.1.load, 0
22 %valueLoadB.fca.1.gep = getelementptr inbounds { i1, i8 }, { i1, i8 }* %predB, i64 0, i32 1
23 %valueLoadB.fca.1.load = load i8, i8* %valueLoadB.fca.1.gep, align 1
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/external/llvm/test/Transforms/EarlyCSE/AArch64/
Dintrinsics.ll9 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
10 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
21 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
22 %2 = bitcast <4 x i32> %s.coerce.fca.1.extract to <16 x i8>
28 %vld2.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 0
29 %vld2.fca.1.extract = extractvalue { <4 x i32>, <4 x i32> } %vld2, 1
30 %call = call <4 x i32> @vaddq_s32(<4 x i32> %vld2.fca.0.extract, <4 x i32> %vld2.fca.0.extract)
44 %s.coerce.fca.0.extract = extractvalue [2 x <4 x i32>] %s.coerce, 0
45 %s.coerce.fca.1.extract = extractvalue [2 x <4 x i32>] %s.coerce, 1
56 %1 = bitcast <4 x i32> %s.coerce.fca.0.extract to <16 x i8>
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/external/llvm/test/CodeGen/Mips/
Ddsp-patterns.ll43 %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0
44 ret { i32 } %.fca.0.insert
56 %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0
57 ret { i32 } %.fca.0.insert
74 %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0
75 ret { i32 } %.fca.0.insert
87 %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0
88 ret { i32 } %.fca.0.insert
100 %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0
101 ret { i32 } %.fca.0.insert
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Ddsp-patterns-cmp-vselect.ll16 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
17 ret { i32 } %.fca.0.insert
33 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
34 ret { i32 } %.fca.0.insert
50 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
51 ret { i32 } %.fca.0.insert
67 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
68 ret { i32 } %.fca.0.insert
84 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
85 ret { i32 } %.fca.0.insert
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Ddsp-r2.ll119 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
120 ret { i32 } %.fca.0.insert
133 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
134 ret { i32 } %.fca.0.insert
147 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
148 ret { i32 } %.fca.0.insert
161 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
162 ret { i32 } %.fca.0.insert
175 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
176 ret { i32 } %.fca.0.insert
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Ddsp-r1.ll370 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
371 ret { i32 } %.fca.0.insert
384 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
385 ret { i32 } %.fca.0.insert
408 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
409 ret { i32 } %.fca.0.insert
422 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
423 ret { i32 } %.fca.0.insert
436 %.fca.0.insert = insertvalue { i32 } undef, i32 %3, 0
437 ret { i32 } %.fca.0.insert
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Dspill-copy-acreg.ll39 %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0
40 ret { i32 } %.fca.0.insert
/external/llvm/test/Transforms/SLPVectorizer/ARM/
Dsroa.ll17 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
18 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
19 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
20 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
24 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
25 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
26 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
27 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
31 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
32 %b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i64
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/external/llvm/test/CodeGen/AArch64/
Dneon-perm.ll2485 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
2486 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
2487 ret %struct.int8x8x2_t %.fca.0.1.insert
2497 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
2498 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
2499 ret %struct.int16x4x2_t %.fca.0.1.insert
2509 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
2510 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
2511 ret %struct.int32x2x2_t %.fca.0.1.insert
2521 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
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Darm64-neon-copyPhysReg-tuple.ll13 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32> } %vld1, 0
14 ret <4 x i32> %vld1.fca.0.extract
27 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
28 ret <4 x i32> %vld1.fca.0.extract
42 %vld1.fca.0.extract = extractvalue { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } %vld1, 0
43 ret <4 x i32> %vld1.fca.0.extract
Dbitfield-insert.ll13 %f.coerce.fca.0.extract = extractvalue [1 x i64] %f.coerce, 0
14 %tmp.sroa.0.0.extract.trunc = trunc i64 %f.coerce.fca.0.extract to i32
20 %tmp1.sroa.1.1.insert.insert = and i64 %f.coerce.fca.0.extract, 4294967040
22 %.fca.0.insert = insertvalue [1 x i64] undef, i64 %tmp1.sroa.0.0.insert.insert, 0
23 ret [1 x i64] %.fca.0.insert
Darm64-abi_align.ll147 %s1.coerce.fca.0.extract = extractvalue [2 x i64] %s1.coerce, 0
148 %s2.coerce.fca.0.extract = extractvalue [2 x i64] %s2.coerce, 0
149 %s1.sroa.0.0.extract.trunc = trunc i64 %s1.coerce.fca.0.extract to i32
150 %s2.sroa.0.0.extract.trunc = trunc i64 %s2.coerce.fca.0.extract to i32
151 %s1.sroa.0.4.extract.shift = lshr i64 %s1.coerce.fca.0.extract, 32
155 %s2.sroa.0.4.extract.shift = lshr i64 %s2.coerce.fca.0.extract, 32
/external/llvm/test/CodeGen/BPF/
Dstruct_ret1.ll14 %.fca.0.insert = insertvalue { i64, i32 } undef, i64 %retval.sroa.0.0.copyload, 0
15 %.fca.1.insert = insertvalue { i64, i32 } %.fca.0.insert, i32 %retval.sroa.2.0.copyload, 1
16 ret { i64, i32 } %.fca.1.insert
/external/llvm/test/Transforms/InstCombine/
D2013-03-05-Combine-BitcastTy-Into-Alloca.ll39 %.fca.0.insert = insertvalue { i64, i64 } undef, i64 %trunc, 0
43 %.fca.1.insert = insertvalue { i64, i64 } %.fca.0.insert, i64 %retval.8.load14, 1
44 ret { i64, i64 } %.fca.1.insert
/external/llvm/test/CodeGen/PowerPC/
Dpr27350.ll12 %.fca.1.insert159.i = insertvalue [2 x i64] undef, i64 %1, 1
13 tail call fastcc void @bar([2 x i64] undef, [2 x i64] %.fca.1.insert159.i) #2
DBreakableToken-reduced.ll214 %Split.coerce.fca.0.extract = extractvalue [2 x i64] %Split.coerce, 0
215 %Split.coerce.fca.1.extract = extractvalue [2 x i64] %Split.coerce, 1
245 %add = add i64 %Split.coerce.fca.0.extract, %conv
248 %Split.sroa.2.8.extract.trunc = trunc i64 %Split.coerce.fca.1.extract to i32
259 %.fca.0.insert11 = insertvalue [2 x i64] undef, i64 %agg.tmp6.sroa.0.0.copyload, 0
260 %.fca.1.insert12 = insertvalue [2 x i64] %.fca.0.insert11, i64 %agg.tmp6.sroa.2.0.copyload, 1
261 %.fca.0.insert = insertvalue [2 x i64] undef, i64 %agg.tmp7.sroa.0.0.copyload, 0
262 %.fca.1.insert = insertvalue [2 x i64] %.fca.0.insert, i64 %1, 1
263 …onv5, i32 zeroext %Split.sroa.2.8.extract.trunc, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.ins…
Dtoc-load-sched-bug.ll185 %.fca.0.insert18 = insertvalue [2 x i64] undef, i64 %1, 0
186 %.fca.1.insert21 = insertvalue [2 x i64] %.fca.0.insert18, i64 %2, 1
187 …STDINENS_9StringRefEl(%"class.llvm::ErrorOr"* sret %FileOrErr, [2 x i64] %.fca.1.insert21, i64 -1)…
/external/llvm/test/CodeGen/X86/
Dfast-isel-deadcode.ll129 %.fca.0.insert.i = insertvalue { <2 x float>, float } undef, <2 x float> %retval.sroa.0.0.i, 0
130 …%.fca.1.insert.i = insertvalue { <2 x float>, float } %.fca.0.insert.i, float %retval.sroa.6.0.i, 1
131 store { <2 x float>, float } %.fca.1.insert.i, { <2 x float>, float }* %tmp, align 8
/external/libmtp/logs/
Dmtp-detect-blackberry-storm.txt5 RIM: BlackBerry Storm (0fca:8007) @ bus 0, dev 6
25 idVendor: 0fca
Dmtp-detect-blackberry-dtek60.txt5 0fca:8041 @ bus 3, dev 7
13 idVendor: 0fca
Dmtp-detect-blackberry-9650.txt1 Device 0 (VID=0fca and PID=8007) is a RIM BlackBerry Storm.
6 RIM: BlackBerry Storm (0fca:8007) @ bus 1, dev 9
14 idVendor: 0fca
/external/google-breakpad/src/tools/windows/dump_syms/testdata/
Ddump_syms_regtest64.sym1533 3fca 8 306 8253
3251 7fca 4 138 6804
Domap_stretched_filled.sym734 1fca a 359 3891
/external/libxml2/result/
Datt4.sax643 SAX.startElement(val, o='89fca', v='53')
3417 SAX.startElement(val, o='89fca', v='224.2')
6191 SAX.startElement(val, o='89fca', v='50')
8965 SAX.startElement(val, o='89fca', v='0.035')
11739 SAX.startElement(val, o='89fca', v='0')
14513 SAX.startElement(val, o='89fca', v='0.06')
17287 SAX.startElement(val, o='89fca', v='120.259')
20061 SAX.startElement(val, o='89fca', v='0')
22835 SAX.startElement(val, o='89fca', v='119.96')
25609 SAX.startElement(val, o='89fca', v='-7')
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