/external/llvm/test/MC/AArch64/ |
D | neon-scalar-fp-compare.s | 117 fcmlt h10, h11, #0.0 118 fcmlt s10, s11, #0.0 119 fcmlt d20, d21, #0.0 120 fcmlt h10, h11, #0 121 fcmlt s10, s11, #0 122 fcmlt d20, d21, #0x0
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D | neon-compare-instructions.s | 245 fcmlt v0.4h, v16.4h, v31.4h 246 fcmlt v4.8h, v15.8h, v7.8h 250 fcmlt v0.2s, v16.2s, v31.2s 251 fcmlt v4.4s, v15.4s, v7.4s 252 fcmlt v29.2d, v5.2d, v2.2d 466 fcmlt v16.4h, v2.4h, #0.0 467 fcmlt v15.8h, v4.8h, #0.0 468 fcmlt v16.2s, v2.2s, #0.0 469 fcmlt v15.4s, v4.4s, #0.0 470 fcmlt v5.2d, v29.2d, #0.0 [all …]
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D | fullfp16-neon-neg.s | 108 fcmlt v0.4h, v16.4h, v31.4h 110 fcmlt v4.8h, v15.8h, v7.8h 144 fcmlt v16.4h, v2.4h, #0.0 146 fcmlt v15.8h, v4.8h, #0.0 148 fcmlt v16.4h, v2.4h, #0 150 fcmlt v15.8h, v4.8h, #0 272 fcmlt h10, h11, #0.0 274 fcmlt h10, h11, #0
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D | neon-diagnostics.s | 585 fcmlt v29.2d, v5.2d, v2.16b 724 fcmlt v29.2d, v5.2d, #255.0 725 fcmlt v29.2d, v5.2d, #255 772 fcmlt v29.2d, v5.2d, #16.0 773 fcmlt v29.2d, v5.2d, #2 4705 fcmlt h10, s11, #0.0 4706 fcmlt d20, s21, #0.0
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D | arm64-advsimd.s | 747 fcmlt.2s v0, v0, #0 766 ; CHECK: fcmlt.2s v0, v0, #0.0 ; encoding: [0x00,0xe8,0xa0,0x0e]
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/external/llvm/test/CodeGen/AArch64/ |
D | neon-compare-instructions.ll | 1886 ; CHECK: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} 1894 ; CHECK: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}} 1902 ; CHECK: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}} 1936 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} 1947 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}} 1957 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}} 1968 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} 1979 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}} 1989 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}} 2000 ; CHECK-NEXT: fcmlt {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} [all …]
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D | arm64-vcmp.ll | 6 ;CHECK: fcmlt.4s [[REG:v[0-9]+]], v0, #0
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D | arm64-neon-compare-instructions.ll | 1187 ; CHECK: fcmlt d0, d0, #0
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2782 defm FCMLT : SIMDFPCmpTwoVector<0, 1, 0b01110, "fcmlt", AArch64fcmltz>; 3186 def : InstAlias<"{fcmlt\t$dst.4h, $src1.4h, $src2.4h" # 3187 "|fcmlt.4h\t$dst, $src1, $src2}", 3189 def : InstAlias<"{fcmlt\t$dst.8h, $src1.8h, $src2.8h" # 3190 "|fcmlt.8h\t$dst, $src1, $src2}", 3193 def : InstAlias<"{fcmlt\t$dst.2s, $src1.2s, $src2.2s" # 3194 "|fcmlt.2s\t$dst, $src1, $src2}", 3196 def : InstAlias<"{fcmlt\t$dst.4s, $src1.4s, $src2.4s" # 3197 "|fcmlt.4s\t$dst, $src1, $src2}", 3199 def : InstAlias<"{fcmlt\t$dst.2d, $src1.2d, $src2.2d" # [all …]
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 428 __ fcmlt(d5, d31, 0.0); in GenerateTestSequenceFP() local 429 __ fcmlt(s18, s23, 0.0); in GenerateTestSequenceFP() local 2560 __ fcmlt(v7.V2D(), v3.V2D(), 0.0); in GenerateTestSequenceNEONFP() local 2561 __ fcmlt(v15.V2S(), v21.V2S(), 0.0); in GenerateTestSequenceNEONFP() local 2562 __ fcmlt(v1.V4S(), v2.V4S(), 0.0); in GenerateTestSequenceNEONFP() local
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D | test-simulator-aarch64.cc | 4324 DEFINE_TEST_NEON_2OPIMM_FCMP_ZERO(fcmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD() 4378 DEFINE_TEST_NEON_2OPIMM_FP_SCALAR_SD(fcmlt, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 351 0x~~~~~~~~~~~~~~~~ 5ee0ebe5 fcmlt d5, d31, #0.0 352 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0 2208 0x~~~~~~~~~~~~~~~~ 4ee0e867 fcmlt v7.2d, v3.2d, #0.0 2209 0x~~~~~~~~~~~~~~~~ 0ea0eaaf fcmlt v15.2s, v21.2s, #0.0 2210 0x~~~~~~~~~~~~~~~~ 4ea0e841 fcmlt v1.4s, v2.4s, #0.0
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D | log-disasm-colour | 351 0x~~~~~~~~~~~~~~~~ 5ee0ebe5 fcmlt d5, d31, #0.0 352 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0 2208 0x~~~~~~~~~~~~~~~~ 4ee0e867 fcmlt v7.2d, v3.2d, #0.0 2209 0x~~~~~~~~~~~~~~~~ 0ea0eaaf fcmlt v15.2s, v21.2s, #0.0 2210 0x~~~~~~~~~~~~~~~~ 4ea0e841 fcmlt v1.4s, v2.4s, #0.0
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D | log-all | 838 0x~~~~~~~~~~~~~~~~ 5ee0ebe5 fcmlt d5, d31, #0.0 840 0x~~~~~~~~~~~~~~~~ 5ea0eaf2 fcmlt s18, s23, #0.0 5719 0x~~~~~~~~~~~~~~~~ 4ee0e867 fcmlt v7.2d, v3.2d, #0.0 5721 0x~~~~~~~~~~~~~~~~ 0ea0eaaf fcmlt v15.2s, v21.2s, #0.0 5723 0x~~~~~~~~~~~~~~~~ 4ea0e841 fcmlt v1.4s, v2.4s, #0.0
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 302 # CHECK: fcmlt v12.4s, v25.4s, #0.0 1678 # CHECK: fcmlt s10, s11, #0.0 1679 # CHECK: fcmlt d20, d21, #0.0
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D | arm64-advsimd.txt | 542 # CHECK: fcmlt.2s v0, v0, #0
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 2517 void fcmlt(const VRegister& vd, const VRegister& vn, double imm);
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D | macro-assembler-aarch64.h | 2350 V(fcmlt, Fcmlt) in NEON_2VREG_MACRO_LIST()
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D | assembler-aarch64.cc | 2636 void Assembler::fcmlt(const VRegister& vd, const VRegister& vn, double value) { in fcmlt() function in vixl::aarch64::Assembler
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 1838 void fcmlt(const VRegister& vd,
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 19876 fcmlt v2.2d, v23.2d, #0 cfb006185cc94b8267b355b84b944dc9 83a4def5ad58bbae42f6d1d1a4e697b1 fffff… 19877 fcmlt v2.4s, v23.4s, #0 3238a9dbbd87629234083df5c5b663dc 7e16bd949e8c348110a1f650871aff9c 00000… 19878 fcmlt v2.2s, v23.2s, #0 c70cf214f27d727357dd4fbcf704b693 e3edbb021a8f9dfd6be6bfb1da119c04 00000…
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