/external/llvm/test/CodeGen/AArch64/ |
D | arm64-fminv.ll | 81 %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in) 87 ; CHECK: fmaxnmv s0, v0.4s 88 %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %in) 95 %maxnm = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 99 declare float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float>) 100 declare float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float>) 101 declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
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D | arm64-vminmaxnm.ll | 71 %max = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 82 declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>)
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D | arm64-neon-across.ll | 5 declare float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float>) 447 ; CHECK: fmaxnmv s{{[0-9]+}}, {{v[0-9]+}}.4s 449 %0 = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %a)
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D | aarch64-minmaxv.ll | 290 ; CHECK: fmaxnmv
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/external/llvm/test/MC/AArch64/ |
D | neon-across.s | 93 fmaxnmv h0, v1.4h 97 fmaxnmv h0, v1.8h 101 fmaxnmv s0, v1.4s
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D | fullfp16-neon-neg.s | 72 fmaxnmv h0, v1.8h
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D | neon-diagnostics.s | 3817 fmaxnmv b0, v1.16b 3835 fmaxnmv h0, v1.8h 3853 fmaxnmv d0, v1.2d define
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 2080 void fmaxnmv(const VRegister& vd, const VRegister& vn);
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D | simulator-aarch64.h | 2900 LogicVRegister fmaxnmv(VectorFormat vform,
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D | macro-assembler-aarch64.h | 2279 V(fmaxnmv, Fmaxnmv) \
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D | simulator-aarch64.cc | 3699 fmaxnmv(vf, rd, rn); in VisitNEONAcrossLanes()
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D | logic-aarch64.cc | 4337 LogicVRegister Simulator::fmaxnmv(VectorFormat vform, in fmaxnmv() function in vixl::aarch64::Simulator
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D | assembler-aarch64.cc | 3481 V(fmaxnmv, NEON_FMAXNMV, vd.Is1S()) \
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/external/vixl/test/aarch64/ |
D | test-simulator-aarch64.cc | 4412 DEFINE_TEST_NEON_ACROSS_FP(fmaxnmv, Basic)
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D | test-trace-aarch64.cc | 2623 __ fmaxnmv(s27, v19.V4S()); in GenerateTestSequenceNEONFP() local
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2122 void fmaxnmv(const VRegister& vd,
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/external/vixl/test/test-trace-reference/ |
D | log-disasm | 2271 0x~~~~~~~~~~~~~~~~ 6e30ca7b fmaxnmv s27, v19.4s
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D | log-disasm-colour | 2271 0x~~~~~~~~~~~~~~~~ 6e30ca7b fmaxnmv s27, v19.4s
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D | log-all | 5845 0x~~~~~~~~~~~~~~~~ 6e30ca7b fmaxnmv s27, v19.4s
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4132 defm FMAXNMV : SIMDFPAcrossLanes<0b01100, 0, "fmaxnmv", int_aarch64_neon_fmaxnmv>;
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 26525 fmaxnmv s2, v23.4s 0c44eb607ce754dd9633af2c6dba4725 e9cf17965aacd64f09a80746786d2194 0000000000…
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 215 aarch64_neon_fmaxnmv, // llvm.aarch64.neon.fmaxnmv 6273 "llvm.aarch64.neon.fmaxnmv", 14213 1, // llvm.aarch64.neon.fmaxnmv
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 207 aarch64_neon_fmaxnmv, // llvm.aarch64.neon.fmaxnmv 6231 "llvm.aarch64.neon.fmaxnmv", 14116 1, // llvm.aarch64.neon.fmaxnmv
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 215 aarch64_neon_fmaxnmv, // llvm.aarch64.neon.fmaxnmv 6273 "llvm.aarch64.neon.fmaxnmv", 14213 1, // llvm.aarch64.neon.fmaxnmv
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 215 aarch64_neon_fmaxnmv, // llvm.aarch64.neon.fmaxnmv 6273 "llvm.aarch64.neon.fmaxnmv", 14213 1, // llvm.aarch64.neon.fmaxnmv
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