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/external/mesa3d/src/gallium/drivers/r600/sb/
Dsb_expr.h68 bool fold(node &n);
69 bool fold(container_node &n);
70 bool fold(alu_node &n);
71 bool fold(fetch_node &n);
72 bool fold(cf_node &n);
/external/llvm/test/Analysis/ScalarEvolution/
Dlatch-dominating-conditions.ll41 %does.not.fold.to.true = icmp slt i8 %idx, 42
42 ; CHECK: call void @side_effect(i1 %does.not.fold.to.true)
43 call void @side_effect(i1 %does.not.fold.to.true)
48 ; CHECK: call void @side_effect(i1 %does.not.fold.to.true)
49 call void @side_effect(i1 %does.not.fold.to.true)
/external/libmojo/third_party/jinja2/
Doptimizer.py54 def fold(self, node): member in Optimizer
67 visit_Filter = visit_Test = visit_CondExpr = fold
68 del fold
/external/swiftshader/third_party/LLVM/test/Assembler/
DConstantExprFoldCast.ll1 ; This test checks to make sure that constant exprs fold in some simple situations
5 @A = global i32* bitcast (i8* null to i32*) ; Cast null -> fold
6 @B = global i32** bitcast (i32** @A to i32**) ; Cast to same type -> fold
/external/llvm/test/Transforms/CodeGenPrepare/
Dbasic.ll7 ; objectsize should fold to a constant, which causes the branch to fold to an
8 ; uncond branch. Next, we fold the control flow alltogether.
/external/llvm/test/Assembler/
DConstantExprFoldCast.ll1 ; This test checks to make sure that constant exprs fold in some simple situations
11 @A = global i32* bitcast (i8* null to i32*) ; Cast null -> fold
12 @B = global i32** bitcast (i32** @A to i32**) ; Cast to same type -> fold
/external/llvm/test/CodeGen/AArch64/
Dfast-isel-folding.ll3 ; Test that we don't fold the shift.
17 ; Test that we don't fold the sign-extend.
31 ; Test that we don't fold the sign-extend.
/external/llvm/test/CodeGen/AMDGPU/
Doperand-folding.ll5 define void @fold_sgpr(i32 addrspace(1)* %out, i32 %fold) {
7 %tmp0 = icmp ne i32 %fold, 0
12 %offset = add i32 %fold, %id
25 %fold = add i32 3, 2
31 %val = or i32 %id, %fold
/external/llvm/test/CodeGen/X86/
Dpr2656.ll9 ; We can not fold either stack load into an 'xor' instruction because that
11 ; We can fold the 16-byte constant load into either 'xor' instruction,
37 ; We can not fold the load from the stack into the 'and' instruction because
39 ; We can fold the load of the constant because it is a 16-byte vector constant.
D2005-01-17-CycleInDAG.ll1 ; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the
4 ; that we do not fold the load into the sub.
Dand-or-fold.ll4 ; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1
17 ; <rdar://problem/7529774> The optimizer shouldn't fold this into (and (or, C), D)
Ddagcombine-shifts.ll3 ; fold (shl (zext (lshr (A, X))), X) -> (zext (shl (lshr (A, X)), X))
7 ; This will help DAGCombiner to identify and then fold the sequence
96 ; Don't fold the pattern if we use arithmetic shifts.
137 ; Don't fold the pattern if there is more than one use of the
190 ; Verify also that we correctly fold the shl-shr sequence into an
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dfold-calls.ll3 ; This shouldn't fold, because sin(inf) is invalid.
11 ; This should fold.
D2004-02-23-ShiftShiftOverflow.ll4 ; Do not fold into shr X, 34, as this uses undefined behavior!
11 ; Do not fold into shl X, 34, as this uses undefined behavior!
/external/llvm/test/Transforms/InstCombine/
Dfold-calls.ll3 ; This shouldn't fold, because sin(inf) is invalid.
11 ; This should fold.
D2004-02-23-ShiftShiftOverflow.ll4 ; Do not fold into shr X, 34, as this uses undefined behavior!
11 ; Do not fold into shl X, 34, as this uses undefined behavior!
Dfold-sqrt-sqrtf.ll4 ; Instcombine tries to fold (fptrunc (sqrt (fpext x))) -> (sqrtf x), but this
5 ; shouldn't fold when sqrtf isn't available.
Dsitofp.ll115 ; This can't fold because the 25-bit input doesn't fit in the mantissa.
145 ; This can fold because the 25-bit input is signed and we disard the sign bit.
154 ; This can't fold because the 26-bit input won't fit the mantissa
165 ; This can fold because the 54-bit output is signed and we disard the sign bit.
174 ; This can't fold because the 55-bit output won't fit the mantissa
Dx86-avx2.ll5 ; Verify that instcombine is able to fold identity shuffles.
23 ; Instcombine should be able to fold the following shuffle to a builtin shufflevector
44 ; Verify that instcombine is able to fold constant shuffles.
64 ; Verify that instcombine is able to fold constant shuffles with undef mask elements.
/external/llvm/test/Analysis/GlobalsModRef/
Dnonescaping-noalias.ll11 ; Ensure that we can fold a store to a load of a global across a store to
28 ; Ensure that we can fold a store to a load of a global across a store to
47 ; Ensure that we can fold a store to a load of a global across a store to
68 ; Ensure that we can fold a store to a load of a global across a store to
102 ; Ensure that we can fold a store to a load of a global across a store to
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2005-01-17-CycleInDAG.ll1 ; This testcase was distilled from 132.ijpeg. Bsaically we cannot fold the
4 ; that we do not fold the load into the sub.
Dand-or-fold.ll4 ; The dag combiner should fold together (x&127)|(y&16711680) -> (x|y)&c1
17 ; <rdar://problem/7529774> The optimizer shouldn't fold this into (and (or, C), D)
Dnarrow-shl-load.ll6 ; DAGCombiner should fold this code in finite time.
34 ; DAGCombiner shouldn't fold the sdiv (ashr) away.
67 ; DAG Combiner can't fold this into a load of the 1'th byte.
/external/swiftshader/third_party/LLVM/test/Transforms/CodeGenPrepare/
Dbasic.ll7 ; objectsize should fold to a constant, which causes the branch to fold to an
/external/llvm/test/CodeGen/ARM/
D2012-03-26-FoldImmBug.ll5 ; fold the immediate by breaking it into two parts and fold them into the

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