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Searched refs:force_writemask_all (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vec4_gs_visitor.cpp160 inst->force_writemask_all = true; in emit_prolog()
168 inst->force_writemask_all = true; in emit_prolog()
183 inst->force_writemask_all = true; in emit_prolog()
229 inst->force_writemask_all = true; in emit_thread_end()
255 inst->force_writemask_all = true; in emit_urb_write_header()
352 inst->force_writemask_all = true; in emit_control_data_bits()
374 inst->force_writemask_all = true; in emit_control_data_bits()
377 inst->force_writemask_all = true; in emit_control_data_bits()
380 inst->force_writemask_all = true; in emit_control_data_bits()
389 inst->force_writemask_all = true; in emit_control_data_bits()
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Dbrw_fs_builder.h61 force_writemask_all(false), in fs_builder()
76 force_writemask_all(inst->force_writemask_all) in fs_builder()
118 assert(force_writemask_all || in group()
145 bld.force_writemask_all = true;
362 force_writemask_all); in emit()
365 inst->force_writemask_all = force_writemask_all; in emit()
653 bool force_writemask_all; variable
Dbrw_vec4_cse.cpp131 a->force_writemask_all == b->force_writemask_all && in instructions_match()
196 copy->force_writemask_all = in opt_cse_local()
197 entry->generator->force_writemask_all; in opt_cse_local()
217 copy->force_writemask_all = inst->force_writemask_all; in opt_cse_local()
Dbrw_vec4_builder.h58 force_writemask_all(false), in shader()
72 force_writemask_all(inst->force_writemask_all) in vec4_builder()
114 assert(force_writemask_all || in group()
132 bld.force_writemask_all = true;
316 inst->force_writemask_all = force_writemask_all; in emit()
625 bool force_writemask_all; variable
Dbrw_fs_cse.cpp177 a->force_writemask_all == b->force_writemask_all && in instructions_match()
234 copy->force_writemask_all = inst->force_writemask_all; in create_copy_instr()
Dbrw_fs_sel_peephole.cpp167 then_mov[i]->force_writemask_all != else_mov[i]->force_writemask_all || in opt_peephole_sel()
Dbrw_vec4_tcs.cpp181 inst->force_writemask_all = true; in emit_input_urb_read()
214 inst->force_writemask_all = true; in emit_output_urb_read()
243 inst->force_writemask_all = true; in emit_urb_write()
246 inst->force_writemask_all = true; in emit_urb_write()
Dgen6_gs_visitor.cpp77 inst->force_writemask_all = true; in emit_prolog()
170 inst->force_writemask_all = true; in gs_emit_vertex()
418 inst->force_writemask_all = true; in emit_thread_end()
619 inst->force_writemask_all = true; in xfb_write()
Dbrw_fs_generator.cpp1087 const unsigned lower_size = inst->force_writemask_all ? inst->exec_size : in generate_scratch_write()
1113 assert(inst->exec_size <= 16 || inst->force_writemask_all); in generate_scratch_read()
1123 assert(inst->exec_size <= 16 || inst->force_writemask_all); in generate_scratch_read_gen7()
1609 brw_set_default_mask_control(p, inst->force_writemask_all); in generate_code()
1613 assert(inst->force_writemask_all || inst->exec_size >= 4); in generate_code()
1614 assert(inst->force_writemask_all || inst->group % inst->exec_size == 0); in generate_code()
1911 assert(inst->force_writemask_all); in generate_code()
1916 assert(inst->force_writemask_all); in generate_code()
1999 assert(inst->force_writemask_all); in generate_code()
Dbrw_shader.h163 bool force_writemask_all:1; member
Dbrw_vec4.cpp806 inst->force_writemask_all = true; in opt_algebraic()
1381 inst->force_writemask_all = true; in eliminate_find_live_channel()
1658 if (inst->force_writemask_all) in dump_instruction()
1870 mov->force_writemask_all = true; in get_timestamp()
Dbrw_vec4_visitor.cpp41 this->force_writemask_all = false; in vec4_instruction()
842 ->force_writemask_all = true; in emit_uniformize()
844 ->force_writemask_all = true; in emit_uniformize()
Dbrw_fs.cpp2353 inst->force_writemask_all = true; in opt_algebraic()
2360 inst->force_writemask_all = true; in opt_algebraic()
2866 inst->force_writemask_all = true; in eliminate_find_live_channel()
3502 mach->force_writemask_all = true; in lower_integer_multiplication()
4552 if (devinfo->gen < 8 && !inst->force_writemask_all) in get_fpu_lowered_simd_width()
4585 !inst->force_writemask_all) { in get_fpu_lowered_simd_width()
5087 .exec_all(inst->force_writemask_all) in lower_simd_width()
5371 if (inst->force_writemask_all) in dump_instruction()
Dbrw_vec4_generator.cpp1521 brw_set_default_mask_control(p, inst->force_writemask_all); in generate_code()
1531 if (!inst->force_writemask_all) in generate_code()
1908 assert(inst->force_writemask_all); in generate_code()
Dbrw_vec4_nir.cpp1225 emit(DIM(dst, brw_imm_df(v)))->force_writemask_all = true; in setup_imm_df()
1251 ->force_writemask_all = true; in setup_imm_df()
1253 ->force_writemask_all = true; in setup_imm_df()
Dbrw_fs_reg_allocate.cpp982 (!inst->force_writemask_all && !per_channel)) in spill_reg()
Dbrw_fs_nir.cpp1910 inst->force_writemask_all = true; in emit_gs_vertex()