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Searched refs:fpreg (Results 1 – 8 of 8) sorted by relevance

/external/libunwind/src/ptrace/
D_UPT_access_fpreg.c80 fpregset_t fpreg; in _UPT_access_fpreg() local
85 if (ptrace(PT_GETFPREGS, pid, (caddr_t)&fpreg, 0) == -1) in _UPT_access_fpreg()
89 memcpy(&fpreg.fpr_xacc[reg], val, sizeof(unw_fpreg_t)); in _UPT_access_fpreg()
91 memcpy(&fpreg.fpr_acc[reg], val, sizeof(unw_fpreg_t)); in _UPT_access_fpreg()
95 if (ptrace(PT_SETFPREGS, pid, (caddr_t)&fpreg, 0) == -1) in _UPT_access_fpreg()
99 memcpy(val, &fpreg.fpr_xacc[reg], sizeof(unw_fpreg_t)); in _UPT_access_fpreg()
101 memcpy(val, &fpreg.fpr_acc[reg], sizeof(unw_fpreg_t)); in _UPT_access_fpreg()
/external/python/cpython2/Modules/_ctypes/libffi/src/pa/
Dffi.c43 #define fldw(addr, fpreg) \ argument
44 __asm__ volatile ("fldw 0(%0), %%" #fpreg "L" : : "r"(addr) : #fpreg)
45 #define fstw(fpreg, addr) \ argument
46 __asm__ volatile ("fstw %%" #fpreg "L, 0(%0)" : : "r"(addr))
47 #define fldd(addr, fpreg) \ argument
48 __asm__ volatile ("fldd 0(%0), %%" #fpreg : : "r"(addr) : #fpreg)
49 #define fstd(fpreg, addr) \ argument
50 __asm__ volatile ("fstd %%" #fpreg "L, 0(%0)" : : "r"(addr))
/external/python/cpython2/Modules/_ctypes/libffi/src/ia64/
Dffi.c49 } fpreg; typedef
56 fpreg fp_regs[8]; /* Contents of 8 fp arg registers. */
111 hfa_type_load (fpreg *fpaddr, int type, void *addr) in hfa_type_load()
133 hfa_type_store (int type, void *addr, fpreg *fpaddr) in hfa_type_store()
496 fpreg *addr = &stack->fp_regs[fpcount++]; in ffi_closure_unix_inner()
510 fpreg *addr = &stack->fp_regs[fpcount++]; in ffi_closure_unix_inner()
526 fpreg *addr = &stack->fp_regs[fpcount++]; in ffi_closure_unix_inner()
/external/vixl/test/aarch64/
Dtest-utils-aarch64.cc170 const FPRegister& fpreg) { in EqualFP32() argument
171 VIXL_ASSERT(fpreg.Is32Bits()); in EqualFP32()
174 uint64_t result_64 = core->dreg_bits(fpreg.GetCode()); in EqualFP32()
183 return EqualFP32(expected, core, core->sreg(fpreg.GetCode())); in EqualFP32()
189 const FPRegister& fpreg) { in EqualFP64() argument
190 VIXL_ASSERT(fpreg.Is64Bits()); in EqualFP64()
191 return EqualFP64(expected, core, core->dreg(fpreg.GetCode())); in EqualFP64()
Dtest-utils-aarch64.h207 const FPRegister& fpreg);
210 const FPRegister& fpreg);
/external/vixl/src/aarch64/
Ddebugger-aarch64.cc116 explicit FPRegisterToken(const FPRegister fpreg) in FPRegisterToken() argument
117 : ValueToken<const FPRegister>(fpreg) {} in FPRegisterToken()
939 VRegister fpreg = NoVReg; in Tokenize() local
942 fpreg = VRegister::GetSRegFromCode(static_cast<unsigned>(code)); in Tokenize()
945 fpreg = VRegister::GetDRegFromCode(static_cast<unsigned>(code)); in Tokenize()
951 return new FPRegisterToken(fpreg); in Tokenize()
1416 FPRegister fpreg = FPRegisterToken::Cast(tok)->value(); in Run() local
1417 debugger->PrintFPRegister(fpreg, format_tok); in Run()
1443 FPRegister fpreg = FPRegisterToken::Cast(target)->value(); in Build() local
1444 target_size = fpreg.GetSizeInBytes(); in Build()
/external/v8/src/arm64/
Dsimulator-arm64.h415 T fpreg(unsigned code) const {
422 return fpreg<float>(code);
426 return fpreg<uint32_t>(code);
430 return fpreg<double>(code);
434 return fpreg<uint64_t>(code);
437 double fpreg(unsigned size, unsigned code) const {
Dsimulator-arm64.cc1154 clr_fpreg_value, fpreg<uint64_t>(code), clr_normal); in PrintFPRegister()
1162 clr_fpreg_value, fpreg<double>(code), clr_normal); in PrintFPRegister()
1170 clr_fpreg_value, fpreg<float>(code), clr_normal); in PrintFPRegister()
1231 clr_fpreg_value, fpreg<uint64_t>(reg_code), clr_normal, in PrintReadFP()
1233 clr_fpreg_value, fpreg<float>(reg_code), clr_normal); in PrintReadFP()
1238 clr_fpreg_value, fpreg<uint64_t>(reg_code), clr_normal, in PrintReadFP()
1240 clr_fpreg_value, fpreg<double>(reg_code), clr_normal); in PrintReadFP()
1295 clr_fpreg_value, fpreg<uint32_t>(reg_code), clr_normal, in PrintWriteFP()
1297 clr_fpreg_value, fpreg<float>(reg_code), clr_normal); in PrintWriteFP()
1302 clr_fpreg_value, fpreg<uint64_t>(reg_code), clr_normal, in PrintWriteFP()
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