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Searched refs:getLoadStoreVecRegBitWidth (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.h85 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace);
DAMDGPUTargetTransformInfo.cpp83 unsigned AMDGPUTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) { in getLoadStoreVecRegBitWidth() function in AMDGPUTTIImpl
/external/llvm/include/llvm/Analysis/
DTargetTransformInfo.h462 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
687 virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) = 0;
878 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) override { in getLoadStoreVecRegBitWidth() function
879 return Impl.getLoadStoreVecRegBitWidth(AddrSpace); in getLoadStoreVecRegBitWidth()
DTargetTransformInfoImpl.h281 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) { return 128; } in getLoadStoreVecRegBitWidth() function
/external/llvm/lib/Transforms/Vectorize/
DLoadStoreVectorizer.cpp520 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in collectInstructions()
556 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in collectInstructions()
683 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in vectorizeStoreChain()
838 unsigned VecRegSize = TTI.getLoadStoreVecRegBitWidth(AS); in vectorizeLoadChain()
/external/llvm/lib/Analysis/
DTargetTransformInfo.cpp248 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { in getLoadStoreVecRegBitWidth() function in TargetTransformInfo
249 return TTIImpl->getLoadStoreVecRegBitWidth(AS); in getLoadStoreVecRegBitWidth()