| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 772 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 909 CondCode getSetCCInverse(CondCode Operation, bool isInteger);
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ISelLowering.cpp | 1143 ISD::getSetCCInverse(CCOpcode, CompareVT == MVT::i32); in LowerSELECT_CC()
1184 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT.isInteger()); in LowerSELECT_CC()
1210 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT == MVT::i32); in LowerSELECT_CC()
2099 LHSCC = ISD::getSetCCInverse(LHSCC, in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 261 CCCode = getSetCCInverse(CCCode, /*isInteger=*/true); in softenSetCCOperands()
1314 Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true); in simplifySetCCWithAnd()
1498 ISD::CondCode InvCond = ISD::getSetCCInverse( in SimplifySetCC()
1661 CC = ISD::getSetCCInverse(CC, in SimplifySetCC()
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| D | LegalizeDAG.cpp | 3615 ISD::CondCode InvCC = ISD::getSetCCInverse(CCOp, in ExpandNode()
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| D | SelectionDAG.cpp | 258 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { in getSetCCInverse() function in ISD
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| D | DAGCombiner.cpp | 4172 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1195 changeFPCCToAArch64CC(getSetCCInverse(CC, false), CondCode, CondCode2); in changeVectorFPCCToAArch64CC()
1401 CC = getSetCCInverse(CC, isInteger); in emitConjunctionDisjunctionTreeRec()
1776 CC = ISD::getSetCCInverse(CC, true); in LowerXOR()
3883 getAArch64Cmp(LHS, RHS, ISD::getSetCCInverse(CC, true), CCVal, DAG, dl); in LowerSETCC()
3901 changeFPCCToAArch64CC(ISD::getSetCCInverse(CC, false), CC1, CC2); in LowerSETCC()
3962 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
3966 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
3973 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
3981 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
4024 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2161 CC = ISD::getSetCCInverse(CC, in SimplifySetCC()
2517 Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true); in SimplifySetCC()
2525 Cond = ISD::getSetCCInverse(Cond, /*isInteger=*/true); in SimplifySetCC()
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| D | SelectionDAG.cpp | 225 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) { in getSetCCInverse() function in ISD
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| D | DAGCombiner.cpp | 3087 ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in visitXOR()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 613 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true)); in performSELECTCombine()
647 SetCC.getOperand(1), ISD::getSetCCInverse(CC, true)); in performSELECTCombine()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 2265 CC = ISD::getSetCCInverse(CC, !IsFP); in getVectorComparisonOrInvert()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6411 CC = ISD::getSetCCInverse(CC, isInt); in combineSelectAndUse()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15626 ISD::CondCode NewCC = ISD::getSetCCInverse(CC, true); in LowerSETCC()
26750 CC = ISD::getSetCCInverse(CC, true); in combineSelect()
26821 ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(), in combineSelect()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3895 CC = ISD::getSetCCInverse(CC, true); in LowerSELECT_CC()
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