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Searched refs:hi16 (Results 1 – 11 of 11) sorted by relevance

/external/skia/src/opts/
DSkBitmapProcState_matrix_neon.h153 int16x8x2_t hi16; in AFFINE_NOFILTER_NAME() local
155 hi16.val[0] = TILEX_PROCF_NEON8(xbase, x2base, maxX); in AFFINE_NOFILTER_NAME()
156 hi16.val[1] = TILEY_PROCF_NEON8(ybase, y2base, maxY); in AFFINE_NOFILTER_NAME()
158 vst2q_s16(dst16, hi16); in AFFINE_NOFILTER_NAME()
/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
DBlackfinRegisterInfo.td20 def hi16 : SubRegIndex;
68 let SubRegIndices = [hi16, lo16];
226 let SubRegClasses = [(D16L lo16), (D16H hi16)];
230 let SubRegClasses = [(P16L lo16), (P16H hi16)];
234 let SubRegClasses = [(DP16L lo16), (DP16H hi16)];
DBlackfinRegisterInfo.cpp144 TII.get(BF::LOAD16i), getSubReg(Reg, BF::hi16)) in loadConstant()
DBlackfinInstrInfo.td475 hi16), PI:$ptr)>;
/external/valgrind/VEX/priv/
Dhost_arm_defs.c2939 UInt hi16 = (imm32 >> 16) & 0xFFFF; in imm32_to_ireg() local
2944 if (hi16 != 0) { in imm32_to_ireg()
2945 instr = XXXXXXXX(0xE, 0x3, 0x4, (hi16 >> 12) & 0xF, rD, in imm32_to_ireg()
2946 (hi16 >> 8) & 0xF, (hi16 >> 4) & 0xF, in imm32_to_ireg()
2947 hi16 & 0xF); in imm32_to_ireg()
3000 UInt hi16 = (imm32 >> 16) & 0xFFFF; in imm32_to_ireg_EXACTLY2() local
3006 instr = XXXXXXXX(0xE, 0x3, 0x4, (hi16 >> 12) & 0xF, rD, in imm32_to_ireg_EXACTLY2()
3007 (hi16 >> 8) & 0xF, (hi16 >> 4) & 0xF, in imm32_to_ireg_EXACTLY2()
3008 hi16 & 0xF); in imm32_to_ireg_EXACTLY2()
3023 UInt hi16 = (imm32 >> 16) & 0xFFFF; in is_imm32_to_ireg_EXACTLY2() local
[all …]
Dhost_x86_isel.c1063 HReg hi16 = newVRegI(env); in iselIntExpr_R_wrk() local
1067 addInstr(env, mk_iMOVsd_RR(hi16s, hi16)); in iselIntExpr_R_wrk()
1069 addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, hi16)); in iselIntExpr_R_wrk()
1071 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo16), hi16)); in iselIntExpr_R_wrk()
1072 return hi16; in iselIntExpr_R_wrk()
Dhost_amd64_isel.c1288 HReg hi16 = newVRegI(env); in iselIntExpr_R_wrk() local
1292 addInstr(env, mk_iMOVsd_RR(hi16s, hi16)); in iselIntExpr_R_wrk()
1294 addInstr(env, AMD64Instr_Sh64(Ash_SHL, 16, hi16)); in iselIntExpr_R_wrk()
1298 Aalu_OR, AMD64RMI_Reg(lo16), hi16)); in iselIntExpr_R_wrk()
1299 return hi16; in iselIntExpr_R_wrk()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUOperands.td160 def hi16 : PatLeaf<(imm), [{
161 // hi16 predicate - returns true if the immediate has all zeros in the
DSPUInstrInfo.td380 def r64: ILHURegInst<R64C, u16imm_i64, hi16>;
381 def r32: ILHURegInst<R32C, u16imm_i32, hi16>;
384 def hi: ILHURegInst<R32C, symbolHi, hi16>;
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMInstrInfo.td273 def hi16 : SDNodeXForm<imm, [{
280 }], hi16>;
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td365 def hi16 : SDNodeXForm<imm, [{
373 }], hi16>;