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/external/llvm/test/DebugInfo/X86/
Dinstcombine-instrinsics.ll5 ; CHECK: call void @llvm.dbg.value(metadata %struct.i14** %p
6 ; CHECK-NOT: call void @llvm.dbg.value(metadata %struct.i14** %p
13 ; } i14;
15 ; int foo(i14**);
18 ; i14* p = 0;
28 %struct.i14 = type { i64 }
32 %p = alloca %struct.i14*, align 8
33 …call void @llvm.dbg.declare(metadata %struct.i14** %p, metadata !11, metadata !DIExpression()), !d…
34 store %struct.i14* null, %struct.i14** %p, align 8, !dbg !18
35 %1 = call i32 @foo(%struct.i14** %p), !dbg !19
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
Dapint-sub.ll98 define i14 @test15(i14 %A, i14 %B) {
99 %C = sub i14 0, %A ; <i14> [#uses=1]
100 %D = srem i14 %B, %C ; <i14> [#uses=1]
101 ret i14 %D
Dapint-shift.ll158 define i1 @test22(i14 %A) {
159 %B = shl i14 %A, 7 ; <i14> [#uses=1]
160 %C = icmp eq i14 %B, 0 ; <i1> [#uses=1]
/external/llvm/test/tools/llvm-nm/X86/
Dradix.s109 .type i14,@object # @i14
110 .globl i14 symbol
112 i14: label
114 .size i14, 4
/external/llvm/test/CodeGen/AArch64/
Darm64-2011-03-09-CPSRSpill.ll37 br i1 undef, label %bb1.i14, label %bb.i13
40 br label %bb1.i14
42 bb1.i14: ; preds = %bb.i13, %bb48
45 bb53: ; preds = %bb1.i14, %bb42
/external/swiftshader/third_party/LLVM/test/Transforms/LoopDeletion/
D2011-06-21-phioperands.ll24 br label %for.cond.i14.us
26 for.cond.i14.us: ; preds = %for.inc.i38.us, %entry.split.us
30 br label %for.cond.i14.us
32 if.end.i23.us: ; preds = %for.cond.i14.us
35 for.cond.i50.us-lcssa.us: ; preds = %if.end.i23.us, %for.cond.i14.us
39 br label %for.cond.i14
41 for.cond.i14: ; preds = %for.inc.i38, %entry.split
44 if.end.i23: ; preds = %for.cond.i14
48 br label %for.cond.i14
50 for.cond.i50.us-lcssa: ; preds = %if.end.i23, %for.cond.i14
/external/llvm/test/Transforms/LoopDeletion/
D2011-06-21-phioperands.ll24 br label %for.cond.i14.us
26 for.cond.i14.us: ; preds = %for.inc.i38.us, %entry.split.us
30 br label %for.cond.i14.us
32 if.end.i23.us: ; preds = %for.cond.i14.us
35 for.cond.i50.us-lcssa.us: ; preds = %if.end.i23.us, %for.cond.i14.us
39 br label %for.cond.i14
41 for.cond.i14: ; preds = %for.inc.i38, %entry.split
44 if.end.i23: ; preds = %for.cond.i14
48 br label %for.cond.i14
50 for.cond.i50.us-lcssa: ; preds = %if.end.i23, %for.cond.i14
/external/llvm/test/CodeGen/ARM/
Dsjlj-prepare-critical-edge.ll70 ; %call.i.i.i14.i.i follows the instruction that saves the value to the stack in
73 ; block to reload %call.i.i.i14.i.i before the phi instruction (%0) in block
97 %call.i.i.i14.i.i = invoke noalias i8* @_Znwm(i32 1024)
102 …r_traitsINS_9allocatorIcEEE9constructIccEEvRS2_PT_RKT0_.exit.i.i.i ], [ %call.i.i.i14.i.i, %entry ]
118 invoke void @_Z4foo2Pci(i8* %call.i.i.i14.i.i, i32 1024)
122 %cmp.i.i.i15 = icmp eq i8* %call.i.i.i14.i.i, null
126 call void @_ZdlPv(i8* %call.i.i.i14.i.i)
145 %cmp.i.i.i21 = icmp eq i8* %call.i.i.i14.i.i, null
149 call void @_ZdlPv(i8* %call.i.i.i14.i.i)
D2011-03-15-LdStMultipleBug.ll27 %tobool.i14 = icmp eq i32 %mul, 0
28 br i1 %tobool.i14, label %_Z14printIsNotZeroi.exit17, label %if.then.i16
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2008-09-09-LinearScanBug.ll20 br i1 false, label %land_rhs3.i.i.i14, label %lor_rhs.i.i.i17
22 land_rhs3.i.i.i14: ; preds = %forinc.i.i11
25 lor_rhs.i.i.i17: ; preds = %land_rhs3.i.i.i14, %forinc.i.i11
30 forcond1.backedge.i.i20: ; preds = %lor_rhs.i.i.i17, %land_rhs3.i.i.i14
31 …%p_87.addr.0.be.i.i18 = phi i32 [ %add.i.i.i16, %lor_rhs.i.i.i17 ], [ 0, %land_rhs3.i.i.i14 ] ; <…
D2011-05-27-CrossClassCoalescing.ll27 %shr.i14 = lshr i32 %tmp6.i12, 8
28 %and14.i = and i32 %shr.i14, 255
Dwiden_shuffle-1.ll39 …%tmp6.i14 = shufflevector <3 x float> %tmp3.i13, <3 x float> zeroinitializer, <4 x i32> <i32 0, i3…
40 %tmp97.i = shufflevector <4 x float> %tmp6.i14, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
/external/llvm/test/CodeGen/X86/
D2008-09-09-LinearScanBug.ll20 br i1 false, label %land_rhs3.i.i.i14, label %lor_rhs.i.i.i17
22 land_rhs3.i.i.i14: ; preds = %forinc.i.i11
25 lor_rhs.i.i.i17: ; preds = %land_rhs3.i.i.i14, %forinc.i.i11
30 forcond1.backedge.i.i20: ; preds = %lor_rhs.i.i.i17, %land_rhs3.i.i.i14
31 …%p_87.addr.0.be.i.i18 = phi i32 [ %add.i.i.i16, %lor_rhs.i.i.i17 ], [ 0, %land_rhs3.i.i.i14 ] ; <…
D2011-05-27-CrossClassCoalescing.ll27 %shr.i14 = lshr i32 %tmp6.i12, 8
28 %and14.i = and i32 %shr.i14, 255
/external/llvm/test/CodeGen/AMDGPU/
Dwrong-transalu-pos-fix.ll21 %y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #1
22 %mul30.i = mul i32 %y.i14.i, %y.i.i
24 %add.i14 = add i32 %mul30.i, %mul7
25 %mul819 = add i32 %add.i14, %y.i6.i
/external/llvm/test/Transforms/SimplifyCFG/
D2006-06-12-InfLoop.ll130 br i1 false, label %loopentry.1.i14.preheader, label %loopentry.3.i.preheader
131 loopentry.1.i14.preheader: ; preds = %checkham.exit
132 br label %loopentry.1.i14
133 loopentry.1.i14: ; preds = %loopexit.1.i18, %loopentry.1.i14.preheader
135 no_exit.1.i16.preheader: ; preds = %loopentry.1.i14
141 loopexit.1.i18: ; preds = %loopexit.1.i18.loopexit, %loopentry.1.i14
142 br i1 false, label %loopentry.1.i14, label %loopentry.3.i.loopexit
292 loopentry.3.i10: ; preds = %loopexit.3.i14, %loopentry.3.i10.preheader
293 br i1 false, label %no_exit.3.preheader.i, label %loopexit.3.i14
297 br i1 false, label %no_exit.3.i12, label %loopexit.3.i14.loopexit
[all …]
Dbranch-fold.ll43 %and.i14.i10 = and i64 %shr.i13.i9, 32767
46 %phitmp = icmp uge i64 %and.i14.i10, %and.i11.i12
D2005-08-01-PHIUpdateFail.ll62 br i1 false, label %loopexit.0.i15, label %no_exit.0.i14
63 no_exit.0.i14: ; preds = %endif.1
/external/swiftshader/third_party/LLVM/test/Transforms/SimplifyCFG/
D2006-06-12-InfLoop.ll130 br i1 false, label %loopentry.1.i14.preheader, label %loopentry.3.i.preheader
131 loopentry.1.i14.preheader: ; preds = %checkham.exit
132 br label %loopentry.1.i14
133 loopentry.1.i14: ; preds = %loopexit.1.i18, %loopentry.1.i14.preheader
135 no_exit.1.i16.preheader: ; preds = %loopentry.1.i14
141 loopexit.1.i18: ; preds = %loopexit.1.i18.loopexit, %loopentry.1.i14
142 br i1 false, label %loopentry.1.i14, label %loopentry.3.i.loopexit
292 loopentry.3.i10: ; preds = %loopexit.3.i14, %loopentry.3.i10.preheader
293 br i1 false, label %no_exit.3.preheader.i, label %loopexit.3.i14
297 br i1 false, label %no_exit.3.i12, label %loopexit.3.i14.loopexit
[all …]
D2005-08-01-PHIUpdateFail.ll62 br i1 false, label %loopexit.0.i15, label %no_exit.0.i14
63 no_exit.0.i14: ; preds = %endif.1
/external/llvm/test/Transforms/GVN/
Dcond_br2.ll15 ; CHECK: br i1 true, label %new.notnull.i11, label %if.end.i14
62 br i1 %cmp.i8, label %new.notnull.i11, label %if.end.i14
64 Retry.i10: ; preds = %if.end.i14
75 if.end.i14: ; preds = %invoke.cont
100 lpad: ; preds = %if.end.i14, %if.end.i, %invoke.cont2
/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
D2011-03-15-LdStMultipleBug.ll33 %tobool.i14 = icmp eq i32 %mul, 0
34 br i1 %tobool.i14, label %_Z14printIsNotZeroi.exit17, label %if.then.i16
/external/libvpx/libvpx/vp8/common/x86/
Dloopfilter_block_sse2_x86_64.asm188 %define i14 [src + 2 * stride7]
245 movdqa xmm9, i14 ; q2, will contain abs(p1-p0)
347 %define i14 [rsp + 224]
536 movdqa i14, xmm5
584 movdqa xmm9, i14 ; q2, will contain abs(p1-p0)
627 movdqa xmm6, i14
665 movdqa i14, xmm2
752 punpcklqdq xmm2, i14
753 punpckhqdq xmm14, i14
/external/llvm/test/Transforms/InstCombine/
Dapint-shift.ll219 define i1 @test22(i14 %A) {
220 %B = shl i14 %A, 7 ; <i14> [#uses=1]
221 %C = icmp eq i14 %B, 0 ; <i1> [#uses=1]
/external/llvm/test/CodeGen/Hexagon/
DbugAsmHWloop.ll30 %addr.addr.01.i = phi i32 [ %6, %entry ], [ %add.i14, %for.body.i ]
32 %add.i14 = add i32 %addr.addr.01.i, 32

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