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/external/llvm/test/Transforms/ConstProp/
Dconstant-expr.ll48 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
51 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256)…
54 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
57 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
60 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
91 @pr9011_10 = constant <4 x double> bitcast (i256 0 to <4 x double>)
97 @pr9011_13 = constant i256 bitcast (<4 x double> zeroinitializer to i256)
98 ; CHECK: pr9011_13 = constant i256 0
Dshift.ll38 define void @shift_undef_256(i256* %p) {
39 %r1 = lshr i256 2, 18446744073709551617
40 ; CHECK: store i256 undef
41 store i256 %r1, i256* %p
43 %r2 = ashr i256 4, 18446744073709551618
44 ; CHECK: store i256 undef
45 store i256 %r2, i256* %p
47 %r3 = shl i256 1, 18446744073709551619
48 ; CHECK: store i256 undef
49 store i256 %r3, i256* %p
/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
Dconstant-expr.ll48 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
51 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @A to i64) to i256)…
54 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
57 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
60 …i256 lshr (i256 or (i256 and (i256 and (i256 shl (i256 zext (i64 ptrtoint (i1* @B to i64) to i256)…
91 @pr9011_10 = constant <4 x double> bitcast (i256 0 to <4 x double>)
97 @pr9011_13 = constant i256 bitcast (<4 x double> zeroinitializer to i256)
98 ; CHECK: pr9011_13 = constant i256 0
/external/llvm/test/CodeGen/X86/
Dscheduler-backtracking.ll11 define i256 @test1(i256 %a) {
12 %b = add i256 %a, 1
13 %m = shl i256 %b, 1
14 %p = add i256 %m, 1
15 %v = lshr i256 %b, %p
16 %t = trunc i256 %v to i1
17 %c = shl i256 1, %p
18 %f = select i1 %t, i256 undef, i256 %c
19 ret i256 %f
23 define i256 @test2(i256 %a) {
[all …]
Drrlist-livereg-corrutpion.ll4 define i64 @test(i64 %a, i256 %b, i1 %c) {
5 %u = zext i64 %a to i256
6 %s = add i256 %u, 1
7 %o = trunc i256 %s to i1
8 %j = add i256 %s, 1
10 %f = select i1 %o, i256 undef, i256 %j
11 %d = select i1 %i, i256 %f, i256 1
12 %e = add i256 %b, 1
13 %n = select i1 %c, i256 %e, i256 %b
14 %m = trunc i256 %n to i64
[all …]
Di256-add.ll5 define void @add(i256* %p, i256* %q) nounwind {
6 %a = load i256, i256* %p
7 %b = load i256, i256* %q
8 %c = add i256 %a, %b
9 store i256 %c, i256* %p
12 define void @sub(i256* %p, i256* %q) nounwind {
13 %a = load i256, i256* %p
14 %b = load i256, i256* %q
15 %c = sub i256 %a, %b
16 store i256 %c, i256* %p
Dlegalize-shl-vec.ll3 define <2 x i256> @test_shl(<2 x i256> %In) {
4 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
5 %Out = shl <2 x i256> %In, %Amt
6 ret <2 x i256> %Out
20 define <2 x i256> @test_srl(<2 x i256> %In) {
21 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
22 %Out = lshr <2 x i256> %In, %Amt
23 ret <2 x i256> %Out
37 define <2 x i256> @test_sra(<2 x i256> %In) {
38 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
[all …]
Dfold-vector-sext-crash2.ll6 define <2 x i256> @test_sext1() {
7 %Se = sext <2 x i8> <i8 -100, i8 -99> to <2 x i256>
8 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
9 ret <2 x i256> %Shuff
28 define <2 x i256> @test_sext2() {
29 %Se = sext <2 x i128> <i128 -2000, i128 -1999> to <2 x i256>
30 %Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
31 ret <2 x i256> %Shuff
50 define <2 x i256> @test_zext1() {
51 %Se = zext <2 x i8> <i8 -1, i8 -2> to <2 x i256>
[all …]
Dfold-vector-shl-crash.ll5 define <2 x i256> @test() {
6 …%S = shufflevector <2 x i256> zeroinitializer, <2 x i256> <i256 -1, i256 -1>, <2 x i32> <i32 0, i3…
7 %B = shl <2 x i256> %S, <i256 -1, i256 -1> ; DAG Combiner crashes here
8 ret <2 x i256> %B
Dshift-i256.ll6 define void @shift1(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
8 %0 = ashr i256 %x, %a
9 store i256 %0, i256* %r
14 define i256 @shift2(i256 %c) nounwind
16 %b = shl i256 1, %c ; %c must not be a constant
20 ret i256 %b
Dmem-promote-integers.ll62 define <1 x i256> @test_1xi256(<1 x i256> %x, <1 x i256>* %b) {
63 %bb = load <1 x i256>, <1 x i256>* %b
64 %tt = xor <1 x i256> %x, %bb
65 store <1 x i256> %tt, <1 x i256>* %b
69 ret <1 x i256> %tt
139 define <2 x i256> @test_2xi256(<2 x i256> %x, <2 x i256>* %b) {
140 %bb = load <2 x i256>, <2 x i256>* %b
141 %tt = xor <2 x i256> %x, %bb
142 store <2 x i256> %tt, <2 x i256>* %b
146 ret <2 x i256> %tt
[all …]
Dmul-i256.ll5 define void @test(i256* %a, i256* %b, i256* %out) #0 {
7 %av = load i256, i256* %a
8 %bv = load i256, i256* %b
9 %r = mul i256 %av, %bv
10 store i256 %r, i256* %out
Dextractelement-index.ll29 %b = extractelement <16 x i8> %a, i256 1
51 %b = extractelement <16 x i8> %a, i256 11
73 %b = extractelement <16 x i8> %a, i256 14
96 %b = extractelement <32 x i8> %a, i256 1
128 %b = extractelement <32 x i8> %a, i256 17
132 define i16 @extractelement_v8i16_0(<8 x i16> %a, i256 %i) nounwind {
144 %b = extractelement <8 x i16> %a, i256 0
148 define i16 @extractelement_v8i16_3(<8 x i16> %a, i256 %i) nounwind {
160 %b = extractelement <8 x i16> %a, i256 3
164 define i16 @extractelement_v16i16_0(<16 x i16> %a, i256 %i) nounwind {
[all …]
D2009-11-13-VirtRegRewriterBug.ll31 %mask271.masked.masked.masked.masked.masked.masked.masked = or i256 0, undef ; <i256> [#uses=2]
32 …sked.masked.masked.masked.masked = or i256 %mask271.masked.masked.masked.masked.masked.masked.mask…
33 %mask241.masked = or i256 undef, undef ; <i256> [#uses=1]
34 %ins237 = or i256 undef, 0 ; <i256> [#uses=1]
53 …%tmp211 = lshr i256 %mask271.masked.masked.masked.masked.masked.masked.masked, 112 ; <i256> [#uses…
55 %tmp208 = lshr i256 %mask266.masked.masked.masked.masked.masked.masked, 128 ; <i256> [#uses=1]
56 %tmp209 = trunc i256 %tmp208 to i16 ; <i16> [#uses=1]
60 %tmp193 = lshr i256 %mask241.masked, 208 ; <i256> [#uses=1]
61 %tmp194 = trunc i256 %tmp193 to i16 ; <i16> [#uses=1]
63 %tmp187 = lshr i256 %ins237, 240 ; <i256> [#uses=1]
[all …]
/external/llvm/test/CodeGen/Generic/
D2011-07-07-ScheduleDAGCrash.ll6 define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) no…
8 %c = load i256, i256* %cc
9 %d = load i256, i256* %dd
10 %add = add nsw i256 %c, %d
11 store i256 %add, i256* %a, align 8
12 %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376
13 %add6 = add nsw i256 %or, %d
14 store i256 %add6, i256* %b, align 8
Dicmp-illegal.ll5 define i1 @test_ult(i256 %a) nounwind {
6 %1 = icmp ult i256 %a, -6432394258550908438
11 define i1 @test_ule(i256 %a) nounwind {
12 %1 = icmp ule i256 %a, -6432394258550908438
17 define i1 @test_ugt(i256 %a) nounwind {
18 %1 = icmp ugt i256 %a, -6432394258550908438
23 define i1 @test_uge(i256 %a) nounwind {
24 %1 = icmp uge i256 %a, -6432394258550908438
29 define i1 @test_slt(i256 %a) nounwind {
30 %1 = icmp slt i256 %a, -6432394258550908438
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Di256-add.ll5 define void @add(i256* %p, i256* %q) nounwind {
6 %a = load i256* %p
7 %b = load i256* %q
8 %c = add i256 %a, %b
9 store i256 %c, i256* %p
12 define void @sub(i256* %p, i256* %q) nounwind {
13 %a = load i256* %p
14 %b = load i256* %q
15 %c = sub i256 %a, %b
16 store i256 %c, i256* %p
Dmem-promote-integers.ll62 define <1 x i256> @test_1xi256(<1 x i256> %x, <1 x i256>* %b) {
63 %bb = load <1 x i256>* %b
64 %tt = xor <1 x i256> %x, %bb
65 store <1 x i256> %tt, <1 x i256>* %b
69 ret <1 x i256> %tt
139 define <2 x i256> @test_2xi256(<2 x i256> %x, <2 x i256>* %b) {
140 %bb = load <2 x i256>* %b
141 %tt = xor <2 x i256> %x, %bb
142 store <2 x i256> %tt, <2 x i256>* %b
146 ret <2 x i256> %tt
[all …]
Dshift-i256.ll4 define void @t(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
6 %0 = ashr i256 %x, %a
7 store i256 %0, i256* %r
D2009-11-13-VirtRegRewriterBug.ll31 %mask271.masked.masked.masked.masked.masked.masked.masked = or i256 0, undef ; <i256> [#uses=2]
32 …sked.masked.masked.masked.masked = or i256 %mask271.masked.masked.masked.masked.masked.masked.mask…
33 %mask241.masked = or i256 undef, undef ; <i256> [#uses=1]
34 %ins237 = or i256 undef, 0 ; <i256> [#uses=1]
53 …%tmp211 = lshr i256 %mask271.masked.masked.masked.masked.masked.masked.masked, 112 ; <i256> [#uses…
55 %tmp208 = lshr i256 %mask266.masked.masked.masked.masked.masked.masked, 128 ; <i256> [#uses=1]
56 %tmp209 = trunc i256 %tmp208 to i16 ; <i16> [#uses=1]
60 %tmp193 = lshr i256 %mask241.masked, 208 ; <i256> [#uses=1]
61 %tmp194 = trunc i256 %tmp193 to i16 ; <i16> [#uses=1]
63 %tmp187 = lshr i256 %ins237, 240 ; <i256> [#uses=1]
[all …]
/external/llvm/test/CodeGen/AArch64/
Dnzcv-save.ll8 define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) no…
10 %c = load i256, i256* %cc
11 %d = load i256, i256* %dd
12 %add = add nsw i256 %c, %d
13 store i256 %add, i256* %a, align 8
14 %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376
15 %add6 = add nsw i256 %or, %d
16 store i256 %add6, i256* %b, align 8
/external/swiftshader/third_party/LLVM/test/CodeGen/Generic/
D2011-07-07-ScheduleDAGCrash.ll6 ; The ARM backend can't handle i256 math at the moment.
9 define void @f(i256* nocapture %a, i256* nocapture %b, i256* nocapture %cc, i256* nocapture %dd) no…
11 %c = load i256* %cc
12 %d = load i256* %dd
13 %add = add nsw i256 %c, %d
14 store i256 %add, i256* %a, align 8
15 %or = or i256 %c, 1606938044258990275541962092341162602522202993782792835301376
16 %add6 = add nsw i256 %or, %d
17 store i256 %add6, i256* %b, align 8
/external/llvm/test/Transforms/SCCP/
Dub-shift.ll38 define void @shift_undef_256(i256* %p) {
39 %r1 = lshr i256 2, 18446744073709551617
40 ; CHECK: store i256 undef
41 store i256 %r1, i256* %p
43 %r2 = ashr i256 4, 18446744073709551618
44 ; CHECK: store i256 undef
45 store i256 %r2, i256* %p
47 %r3 = shl i256 1, 18446744073709551619
48 ; CHECK: store i256 undef
49 store i256 %r3, i256* %p
/external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/
Di256param.ll2 @i256_s = external global i256 ; <i256*> [#uses=1]
4 define void @i256_ls(i256 %x) nounwind {
5 store i256 %x, i256* @i256_s
/external/llvm/test/Transforms/InstSimplify/
Dcall.ll46 declare i256 @llvm.cttz.i256(i256 %src, i1 %is_zero_undef)
48 define i256 @test_cttz() {
50 %x = call i256 @llvm.cttz.i256(i256 10, i1 false)
51 ret i256 %x
52 ; CHECK-NEXT: ret i256 1
55 declare i256 @llvm.ctpop.i256(i256 %src)
57 define i256 @test_ctpop() {
59 %x = call i256 @llvm.ctpop.i256(i256 10)
60 ret i256 %x
61 ; CHECK-NEXT: ret i256 2

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