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/external/llvm/test/Transforms/InstCombine/
Dx86-pshufb.ll6 define <16 x i8> @identity_test(<16 x i8> %InVec) {
8 ; CHECK-NEXT: ret <16 x i8> %InVec
10 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i…
11 ret <16 x i8> %1
14 define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) {
16 ; CHECK-NEXT: ret <32 x i8> %InVec
18 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, …
19 ret <32 x i8> %1
24 define <16 x i8> @fold_to_zero_vector(<16 x i8> %InVec) {
26 ; CHECK-NEXT: ret <16 x i8> zeroinitializer
[all …]
D2006-12-23-Select-Cmp-Cmp.ll9 …i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i32, i32, i32, i32, i16, …
10 %struct.mng_palette8e = type { i8, i8, i8 }
11 %struct.mng_pushdata = type { i8*, i8*, i32, i8, i8*, i32 }
12 …i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i8, i16, i8, i8, i32, i32, i8, i32, i32, i32, i32, i32,…
13 …struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32…
17 %tmp = load i8, i8* null ; <i8> [#uses=1]
18 %tmp.upgrd.1 = icmp ugt i8 %tmp, 8 ; <i1> [#uses=1]
/external/llvm/test/CodeGen/SystemZ/
Dvec-const-07.ll6 define <16 x i8> @f1() {
10 ret <16 x i8> <i8 1, i8 1, i8 1, i8 1,
11 i8 1, i8 1, i8 1, i8 1,
12 i8 1, i8 1, i8 1, i8 1,
13 i8 1, i8 1, i8 1, i8 1>
17 define <16 x i8> @f2() {
21 ret <16 x i8> <i8 201, i8 201, i8 201, i8 201,
22 i8 201, i8 201, i8 201, i8 201,
23 i8 201, i8 201, i8 201, i8 201,
24 i8 201, i8 201, i8 201, i8 201>
[all …]
Dvec-const-13.ll7 define <16 x i8> @f1() {
11 ret <16 x i8> <i8 0, i8 0, i8 128, i8 0,
12 i8 0, i8 0, i8 128, i8 0,
13 i8 0, i8 0, i8 128, i8 0,
14 i8 0, i8 0, i8 128, i8 0>
18 define <16 x i8> @f2() {
22 ret <16 x i8> <i8 0, i8 1, i8 255, i8 255,
23 i8 0, i8 1, i8 255, i8 255,
24 i8 0, i8 1, i8 255, i8 255,
25 i8 0, i8 1, i8 255, i8 255>
[all …]
Dframe-19.ll7 define void @f1(<16 x i8> *%ptr) {
30 %v0 = load volatile <16 x i8>, <16 x i8> *%ptr
31 %v1 = load volatile <16 x i8>, <16 x i8> *%ptr
32 %v2 = load volatile <16 x i8>, <16 x i8> *%ptr
33 %v3 = load volatile <16 x i8>, <16 x i8> *%ptr
34 %v4 = load volatile <16 x i8>, <16 x i8> *%ptr
35 %v5 = load volatile <16 x i8>, <16 x i8> *%ptr
36 %v6 = load volatile <16 x i8>, <16 x i8> *%ptr
37 %v7 = load volatile <16 x i8>, <16 x i8> *%ptr
38 %v8 = load volatile <16 x i8>, <16 x i8> *%ptr
[all …]
/external/llvm/test/CodeGen/Mips/msa/
Di8.ll6 …di_b_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i…
7 …_andi_b_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,…
11 %0 = load <16 x i8>, <16 x i8>* @llvm_mips_andi_b_ARG1
12 %1 = tail call <16 x i8> @llvm.mips.andi.b(<16 x i8> %0, i32 25)
13 store <16 x i8> %1, <16 x i8>* @llvm_mips_andi_b_RES
17 declare <16 x i8> @llvm.mips.andi.b(<16 x i8>, i32) nounwind
25 …bmnzi_b_ARG1 = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,…
26 …zi_b_ARG2 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i…
27 …bmnzi_b_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0,…
31 %0 = load <16 x i8>, <16 x i8>* @llvm_mips_bmnzi_b_ARG1
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-sli-sri-opt.ll3 define void @testLeftGood(<16 x i8> %src1, <16 x i8> %src2, <16 x i8>* %dest) nounwind {
6 …nd <16 x i8> %src1, <i8 252, i8 252, i8 252, i8 252, i8 252, i8 252, i8 252, i8 252, i8 252, i8 25…
7 …%vshl_n = shl <16 x i8> %src2, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, …
8 %result = or <16 x i8> %and.i, %vshl_n
9 store <16 x i8> %result, <16 x i8>* %dest, align 16
13 define void @testLeftBad(<16 x i8> %src1, <16 x i8> %src2, <16 x i8>* %dest) nounwind {
16 …nd <16 x i8> %src1, <i8 165, i8 165, i8 165, i8 165, i8 165, i8 165, i8 165, i8 165, i8 165, i8 16…
17 …%vshl_n = shl <16 x i8> %src2, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, …
18 %result = or <16 x i8> %and.i, %vshl_n
19 store <16 x i8> %result, <16 x i8>* %dest, align 16
[all …]
Darm64-tbl.ll3 define <8 x i8> @tbl1_8b(<16 x i8> %A, <8 x i8> %B) nounwind {
6 %tmp3 = call <8 x i8> @llvm.aarch64.neon.tbl1.v8i8(<16 x i8> %A, <8 x i8> %B)
7 ret <8 x i8> %tmp3
10 define <16 x i8> @tbl1_16b(<16 x i8> %A, <16 x i8> %B) nounwind {
13 %tmp3 = call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> %A, <16 x i8> %B)
14 ret <16 x i8> %tmp3
17 define <8 x i8> @tbl2_8b(<16 x i8> %A, <16 x i8> %B, <8 x i8> %C) {
20 %tmp3 = call <8 x i8> @llvm.aarch64.neon.tbl2.v8i8(<16 x i8> %A, <16 x i8> %B, <8 x i8> %C)
21 ret <8 x i8> %tmp3
24 define <16 x i8> @tbl2_16b(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) {
[all …]
Darm64-promote-const.ll8 %struct.uint8x16x4_t = type { [4 x <16 x i8>] }
35 …i8>] [<16 x i8> <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -115,…
39 define <16 x i8> @test2(<16 x i8> %arg) {
60 …dd <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -1…
61 …l <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -…
62 %add.i9 = add <16 x i8> %add.i, %mul.i
63 ret <16 x i8> %add.i9
68 define <16 x i8> @test3(<16 x i8> %arg, i32 %path) {
84 …dd <16 x i8> %arg, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -1…
89 …l <16 x i8> %add.i, <i8 -40, i8 -93, i8 -118, i8 -99, i8 -75, i8 -105, i8 74, i8 -110, i8 62, i8 -…
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dbyval5.ll27 %struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
28 i8, i8, i8, i8, i8, i8, i8, i8,
29 i8, i8, i8, i8, i8, i8, i8, i8,
30 i8, i8, i8, i8, i8, i8, i8, i8,
31 i8, i8, i8, i8, i8, i8, i8, i8,
32 i8, i8, i8, i8, i8, i8, i8, i8,
33 i8, i8, i8, i8, i8, i8, i8, i8,
34 i8, i8, i8, i8, i8, i8, i8, i8,
35 i8, i8, i8, i8, i8, i8, i8, i8,
36 i8, i8, i8, i8, i8, i8, i8, i8,
[all …]
/external/llvm/test/CodeGen/X86/
Dvector-shuffle-combining-avx2.ll6 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)
7 declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>)
9 define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) {
14 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 12…
15 …%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i3…
16 ret <32 x i8> %2
19 define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) {
24 …i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14…
25 …%2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 …
26 ret <32 x i8> %2
[all …]
Dbyval5.ll27 %struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
28 i8, i8, i8, i8, i8, i8, i8, i8,
29 i8, i8, i8, i8, i8, i8, i8, i8,
30 i8, i8, i8, i8, i8, i8, i8, i8,
31 i8, i8, i8, i8, i8, i8, i8, i8,
32 i8, i8, i8, i8, i8, i8, i8, i8,
33 i8, i8, i8, i8, i8, i8, i8, i8,
34 i8, i8, i8, i8, i8, i8, i8, i8,
35 i8, i8, i8, i8, i8, i8, i8, i8,
36 i8, i8, i8, i8, i8, i8, i8, i8,
[all …]
Dvector-shuffle-combining-ssse3.ll10 declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>)
12 define <16 x i8> @combine_vpshufb_zero(<16 x i8> %a0) {
22 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 0, i8 0, i8 0, i8 0, i8 0, i8…
23 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 0, i8 128, i8 0, i8 0, i8 0, i8 0, …
24 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res1, <16 x i8> <i8 0, i8 1, i8 128, i8 128, i8 128, i8…
25 ret <16 x i8> %res2
28 define <16 x i8> @combine_vpshufb_movq(<16 x i8> %a0) {
38 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 0, i8 128, i8 1, i8 128, i8 2, i8 128…
39 …i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %res0, <16 x i8> <i8 0, i8 2, i8 4, i8 6, i8 8, i8 10, i…
40 ret <16 x i8> %res1
[all …]
DAtomics-64.ll3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
6 @sc = common global i8 0
7 @uc = common global i8 0
19 %0 = atomicrmw add i8* @sc, i8 1 monotonic
20 %1 = atomicrmw add i8* @uc, i8 1 monotonic
21 %2 = bitcast i8* bitcast (i16* @ss to i8*) to i16*
23 %4 = bitcast i8* bitcast (i16* @us to i8*) to i16*
25 %6 = bitcast i8* bitcast (i32* @si to i8*) to i32*
27 %8 = bitcast i8* bitcast (i32* @ui to i8*) to i32*
29 %10 = bitcast i8* bitcast (i64* @sl to i8*) to i64*
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/
D2006-12-23-Select-Cmp-Cmp.ll9 …i8*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8, i32, i32, i32, i8, i32, i32, i32, i32, i16, …
10 %struct.mng_palette8e = type { i8, i8, i8 }
11 %struct.mng_pushdata = type { i8*, i8*, i32, i8, i8*, i32 }
12 …i8, i8, i8, i8, i8, i8, i8, i16, i16, i16, i8, i16, i8, i8, i32, i32, i8, i32, i32, i32, i32, i32,…
13 …struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32…
17 %tmp = load i8* null ; <i8> [#uses=1]
18 %tmp.upgrd.1 = icmp ugt i8 %tmp, 8 ; <i1> [#uses=1]
/external/llvm/test/Transforms/ObjCARC/
Dmove-and-form-retain-autorelease.ll7 ; CHECK: tail call i8* @objc_retainAutorelease(i8* %tmp71x) [[NUW:#[0-9]+]]
10 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
13 %0 = type { i8* (i8*, %1*, ...)*, i8* }
14 %1 = type { i8*, i8* }
15 %2 = type { %2*, %2*, %3*, i8* (i8*, i8*)**, %4* }
17 %4 = type { i32, i32, i32, i8*, i8*, %5*, %7*, %10*, i8*, %9* }
19 %6 = type { i8*, i8*, i8* }
21 %8 = type { i8*, i8*, %7*, %5*, %5*, %5*, %5*, %9*, i32, i32 }
24 %11 = type { i64*, i8*, i8*, i32, i32 }
25 %12 = type { i32*, i32, i8*, i64 }
[all …]
/external/llvm/test/Transforms/WholeProgramDevirt/
Dvirtual-const-prop-end.ll6 …i8], [4 x i8*], [8 x i8] } { [0 x i8] zeroinitializer, [4 x i8*] [i8* null, i8* bitcast (i1 (i8*)*…
7 @vt1 = constant [4 x i8*] [
8 i8* null,
9 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
10 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
11 i8* bitcast (i32 (i8*)* @vf1i32 to i8*)
14 …i8], [3 x i8*], [8 x i8] } { [0 x i8] zeroinitializer, [3 x i8*] [i8* bitcast (i1 (i8*)* @vf1i1 to…
15 @vt2 = constant [3 x i8*] [
16 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
17 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
[all …]
Dvirtual-const-prop-begin.ll6 …i8], [3 x i8*], [0 x i8] } { [8 x i8] c"\00\00\00\01\01\00\00\00", [3 x i8*] [i8* bitcast (i1 (i8*…
7 @vt1 = constant [3 x i8*] [
8 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
9 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
10 i8* bitcast (i32 (i8*)* @vf1i32 to i8*)
13 …i8], [3 x i8*], [0 x i8] } { [8 x i8] c"\00\00\00\02\02\00\00\00", [3 x i8*] [i8* bitcast (i1 (i8*…
14 @vt2 = constant [3 x i8*] [
15 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
16 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
17 i8* bitcast (i32 (i8*)* @vf2i32 to i8*)
[all …]
Dvirtual-const-prop-check.ll11 …i8], [3 x i8*], [0 x i8] } { [8 x i8] c"\00\00\00\01\01\00\00\00", [3 x i8*] [i8* bitcast (i1 (i8*…
12 @vt1 = constant [3 x i8*] [
13 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
14 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
15 i8* bitcast (i32 (i8*)* @vf1i32 to i8*)
18 …i8], [3 x i8*], [0 x i8] } { [8 x i8] c"\00\00\00\02\02\00\00\00", [3 x i8*] [i8* bitcast (i1 (i8*…
19 @vt2 = constant [3 x i8*] [
20 i8* bitcast (i1 (i8*)* @vf1i1 to i8*),
21 i8* bitcast (i1 (i8*)* @vf0i1 to i8*),
22 i8* bitcast (i32 (i8*)* @vf2i32 to i8*)
[all …]
/external/swiftshader/third_party/LLVM/test/CodeGen/CellSPU/
Dicmp8.ll12 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-…
27 ; i8 integer comparisons:
28 define i8 @icmp_eq_select_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
30 %A = icmp eq i8 %arg1, %arg2
31 %B = select i1 %A, i8 %val1, i8 %val2
32 ret i8 %B
35 define i1 @icmp_eq_setcc_i8(i8 %arg1, i8 %arg2, i8 %val1, i8 %val2) nounwind {
37 %A = icmp eq i8 %arg1, %arg2
41 define i8 @icmp_eq_immed01_i8(i8 %arg1, i8 %val1, i8 %val2) nounwind {
43 %A = icmp eq i8 %arg1, 127
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/ConstProp/
Doverflow-ops.ll4 declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
5 declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8)
6 declare {i8, i1} @llvm.umul.with.overflow.i8(i8, i8)
8 declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
9 declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8)
10 declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
16 define {i8, i1} @uadd_1() nounwind {
18 %t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 42, i8 100)
19 ret {i8, i1} %t
22 ; CHECK: ret { i8, i1 } { i8 -114, i1 false }
[all …]
/external/llvm/test/Transforms/ConstProp/
Doverflow-ops.ll4 declare {i8, i1} @llvm.uadd.with.overflow.i8(i8, i8)
5 declare {i8, i1} @llvm.usub.with.overflow.i8(i8, i8)
6 declare {i8, i1} @llvm.umul.with.overflow.i8(i8, i8)
8 declare {i8, i1} @llvm.sadd.with.overflow.i8(i8, i8)
9 declare {i8, i1} @llvm.ssub.with.overflow.i8(i8, i8)
10 declare {i8, i1} @llvm.smul.with.overflow.i8(i8, i8)
16 define {i8, i1} @uadd_1() nounwind {
18 %t = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 42, i8 100)
19 ret {i8, i1} %t
22 ; CHECK: ret { i8, i1 } { i8 -114, i1 false }
[all …]
/external/swiftshader/third_party/LLVM/test/Transforms/ObjCARC/
Dmove-and-form-retain-autorelease.ll7 ; CHECK: tail call i8* @objc_retainAutorelease(i8* %tmp71x) nounwind
10 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
13 %0 = type { i8* (i8*, %1*, ...)*, i8* }
14 %1 = type { i8*, i8* }
15 %2 = type { %2*, %2*, %3*, i8* (i8*, i8*)**, %4* }
17 %4 = type { i32, i32, i32, i8*, i8*, %5*, %7*, %10*, i8*, %9* }
19 %6 = type { i8*, i8*, i8* }
21 %8 = type { i8*, i8*, %7*, %5*, %5*, %5*, %5*, %9*, i32, i32 }
24 %11 = type { i64*, i8*, i8*, i32, i32 }
25 %12 = type { i32*, i32, i8*, i64 }
[all …]
/external/llvm/test/Transforms/GlobalOpt/
Dcrash-2.ll6 %struct.S0.1.7.13 = type { i8, i8, i8, i8, i16, [2 x i8] }
7 %struct.S1.2.8.14 = type { i32, i16, i8, i8 }
9 @.str = external unnamed_addr constant [2 x i8], align 1
10 @g_25 = external global i8, align 1
11 @g_71 = internal global %struct.S0.1.7.13 { i8 1, i8 -93, i8 58, i8 -1, i16 -5, [2 x i8] undef }, a…
12 @g_114 = external global i8, align 1
13 @g_30 = external global { i32, i8, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8,…
14 …i8*]]] [[6 x [5 x i8*]] [[5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13, %struct.S0.1.7.…
17 …%tmp = load i8, i8* getelementptr inbounds (%struct.S0.1.7.13, %struct.S0.1.7.13* @g_71, i32 0, i3…
/external/llvm/test/Verifier/
Drange-1.ll3 define void @f1(i8* %x) {
5 store i8 0, i8* %x, align 1, !range !0
8 !0 = !{i8 0, i8 1}
10 ; CHECK-NEXT: store i8 0, i8* %x, align 1, !range !0
12 define i8 @f2(i8* %x) {
14 %y = load i8, i8* %x, align 1, !range !1
15 ret i8 %y
20 define i8 @f3(i8* %x) {
22 %y = load i8, i8* %x, align 1, !range !2
23 ret i8 %y
[all …]

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