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Searched refs:isIndirectBranch (Results 1 – 25 of 61) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/MC/
DMCInstrAnalysis.h43 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch() function
44 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch()
DMCInstrDesc.h333 bool isIndirectBranch() const { in isIndirectBranch() function
342 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch()
350 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch()
/external/llvm/include/llvm/MC/
DMCInstrAnalysis.h46 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch() function
47 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch()
DMCInstrDesc.h237 bool isIndirectBranch() const { return Flags & (1 << MCID::IndirectBranch); } in isIndirectBranch() function
244 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch()
252 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch()
/external/llvm/lib/Target/Hexagon/
DHexagonIsetDx.td32 …GenOnly = 1, isPredicated = 1, isPredicatedFalse = 1, isBranch = 1, isIndirectBranch = 1, hasSideE…
53 …dicatedFalse = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
122 …deGenOnly = 1, isPredicated = 1, isPredicatedNew = 1, isBranch = 1, isIndirectBranch = 1, hasSideE…
211 …isPredicated = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
277 let Defs = [PC], Uses = [R31], isCodeGenOnly = 1, isBranch = 1, isIndirectBranch = 1, hasSideEffect…
536 …ated = 1, isPredicatedFalse = 1, isPredicatedNew = 1, isBranch = 1, isIndirectBranch = 1, hasSideE…
560 …sCodeGenOnly = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
599 …ses = [P0, R31], isCodeGenOnly = 1, isPredicated = 1, isBranch = 1, isIndirectBranch = 1, hasSideE…
696 …redicatedNew = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
706 …redicatedNew = 1, mayLoad = 1, accessSize = DoubleWordAccess, isBranch = 1, isIndirectBranch = 1 in
/external/llvm/lib/MC/
DMCInstrDesc.cpp35 if (isBranch() || isCall() || isReturn() || isIndirectBranch()) in mayAffectControlFlow()
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h467 bool isIndirectBranch(QueryType Type = AnyInBundle) const {
476 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type);
484 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
/external/llvm/lib/Target/PowerPC/
DPPCEarlyReturn.cpp123 if (J->isIndirectBranch()) { in processBlock()
/external/llvm/lib/Target/Mips/
DMipsLongBranch.cpp146 assert(!FirstBr->isIndirectBranch() && "Unexpected indirect branch found."); in splitMBB()
188 if ((Br != End) && !Br->isIndirectBranch() && in initMBBInfo()
DMipsInstrInfo.cpp203 return LastInst->isIndirectBranch() ? BT_Indirect : BT_None; in analyzeBranch()
DMicroMipsInstrInfo.td442 let isIndirectBranch = 1;
452 let isIndirectBranch = 1;
471 let isIndirectBranch = 1;
DMips32r6InstrInfo.td448 bit isIndirectBranch = 1;
466 bit isIndirectBranch = 1;
/external/swiftshader/third_party/LLVM/utils/TableGen/
DCodeGenInstruction.h221 bool isIndirectBranch; variable
DInstrInfoEmitter.cpp274 if (Inst.isIndirectBranch) OS << "|(1<<MCID::IndirectBranch)"; in emitRecord()
DCodeGenInstruction.cpp296 isIndirectBranch = R->getValueAsBit("isIndirectBranch"); in CodeGenInstruction()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h226 bool isIndirectBranch : 1; variable
DInstrInfoEmitter.cpp481 if (Inst.isIndirectBranch) OS << "|(1ULL<<MCID::IndirectBranch)"; in emitRecord()
DCodeGenInstruction.cpp305 isIndirectBranch = R->getValueAsBit("isIndirectBranch"); in CodeGenInstruction()
/external/llvm/lib/Target/XCore/
DXCoreInstrInfo.td677 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
958 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
963 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
968 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
973 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
1107 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXInstrInfo.cpp345 return desc.isTerminator() || desc.isBranch() || desc.isIndirectBranch(); in IsAnyKindOfBranch()
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrInfo.td500 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1,
506 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1 in {
530 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
536 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreInstrInfo.td712 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in {
958 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
963 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
968 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in
1043 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyCFGStackify.cpp92 AllAnalyzable &= Term.isBranch() && !Term.isIndirectBranch(); in MaybeUpdateTerminator()
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp287 if (HexagonMCInstrInfo::getDesc(MCII, MCI).isIndirectBranch() && in checkBranches()
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td57 let isIndirectBranch = 1 in
92 let isIndirectBranch = 1 in
100 let isIndirectBranch = 1 in {
145 let isIndirectBranch = 1 in {
272 let isIndirectBranch = 1 in {

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