/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 51 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 55 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 80 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot() 84 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
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D | MLxExpansionPass.cpp | 88 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getAccDefMI() 116 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg() 127 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg()
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/external/llvm/lib/Target/ARM/ |
D | Thumb1InstrInfo.cpp | 76 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 80 (TargetRegisterInfo::isPhysicalRegister(SrcReg) && in storeRegToStackSlot() 102 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot() 106 (TargetRegisterInfo::isPhysicalRegister(DestReg) && in loadRegFromStackSlot()
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D | MLxExpansionPass.cpp | 91 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getAccDefMI() 119 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg() 130 if (TargetRegisterInfo::isPhysicalRegister(Reg) || in getDefReg() 145 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in hasLoopHazard()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | DeadMachineInstructionElim.cpp | 73 if (TargetRegisterInfo::isPhysicalRegister(Reg) ? in isDead() 109 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in runOnMachineFunction() 167 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction() 184 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction()
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D | RegisterCoalescer.cpp | 253 if (TargetRegisterInfo::isPhysicalRegister(Src)) { in setRegisters() 254 if (TargetRegisterInfo::isPhysicalRegister(Dst)) in setRegisters() 263 if (TargetRegisterInfo::isPhysicalRegister(Dst)) { in setRegisters() 318 assert(!(TargetRegisterInfo::isPhysicalRegister(Dst) && DstSub) && in setRegisters() 327 if (SubIdx || TargetRegisterInfo::isPhysicalRegister(DstReg)) in flip() 350 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) { in isCoalescable() 351 if (!TargetRegisterInfo::isPhysicalRegister(Dst)) in isCoalescable() 494 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) { in AdjustCopiesBackFrom() 524 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) { in AdjustCopiesBackFrom() 686 if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) in RemoveCopyByCommutingDef() [all …]
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D | MachineInstr.cpp | 128 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in substPhysReg() 763 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) || in isIdenticalTo() 764 TargetRegisterInfo::isPhysicalRegister(OMO.getReg())) in isIdenticalTo() 904 TargetRegisterInfo::isPhysicalRegister(MOReg) && in findRegisterUseOperandIdx() 905 TargetRegisterInfo::isPhysicalRegister(Reg) && in findRegisterUseOperandIdx() 948 bool isPhys = TargetRegisterInfo::isPhysicalRegister(Reg); in findRegisterDefOperandIdx() 956 TargetRegisterInfo::isPhysicalRegister(MOReg)) { in findRegisterDefOperandIdx() 1136 if (TargetRegisterInfo::isPhysicalRegister(ToReg)) { in substituteRegister() 1425 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in print() 1565 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); in addRegisterKilled() [all …]
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D | RegAllocFast.cpp | 326 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && in usePhysReg() 488 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) || in allocVirtReg() 551 if ((!Hint || !TargetRegisterInfo::isPhysicalRegister(Hint)) && in defineVirtReg() 673 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in handleThroughOperands() 722 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in handleThroughOperands() 749 assert(TargetRegisterInfo::isPhysicalRegister(*I) && in AllocateBasicBlock() 801 assert(TargetRegisterInfo::isPhysicalRegister(i->second.PhysReg) && in AllocateBasicBlock() 952 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in AllocateBasicBlock() 984 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in AllocateBasicBlock()
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D | RegAllocLinearScan.cpp | 314 assert(TargetRegisterInfo::isPhysicalRegister(physReg) && in addRegUse() 322 assert(TargetRegisterInfo::isPhysicalRegister(physReg) && in delRegUse() 333 assert(TargetRegisterInfo::isPhysicalRegister(physReg) && in isRegAvail() 572 if (TargetRegisterInfo::isPhysicalRegister(i->second->reg)) { in initIntervalSets() 648 bool isPhys = TargetRegisterInfo::isPhysicalRegister(cur.reg); in linearScan() 665 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && in linearScan() 1002 if (TargetRegisterInfo::isPhysicalRegister(SrcReg)) in assignRegOrStackSlotAtInterval() 1279 assert(TargetRegisterInfo::isPhysicalRegister(minReg) && in assignRegOrStackSlotAtInterval() 1340 assert(!TargetRegisterInfo::isPhysicalRegister(i->reg)); in assignRegOrStackSlotAtInterval() 1347 assert(!TargetRegisterInfo::isPhysicalRegister(i->reg)); in assignRegOrStackSlotAtInterval() [all …]
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D | ExpandPostRAPseudos.cpp | 115 assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && in LowerSubregToReg() 117 assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && in LowerSubregToReg()
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D | PeepholeOptimizer.cpp | 138 if (TargetRegisterInfo::isPhysicalRegister(DstReg) || in OptimizeExtInstr() 139 TargetRegisterInfo::isPhysicalRegister(SrcReg)) in OptimizeExtInstr() 340 TargetRegisterInfo::isPhysicalRegister(SrcReg)) in OptimizeCmpInstr()
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D | TwoAddressInstructionPass.cpp | 406 IsSrcPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg); in isCopyToReg() 407 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in isCopyToReg() 433 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in isKilled() 492 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in findOnlyInterestingUse() 508 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getMappedReg() 802 if (TargetRegisterInfo::isPhysicalRegister(Kill)) in canUpdateDeletedKills() 1444 TargetRegisterInfo::isPhysicalRegister(DstReg) || in EliminateRegSequences() 1457 TargetRegisterInfo::isPhysicalRegister(SrcReg)) { in EliminateRegSequences()
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D | MachineSink.cpp | 304 if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) in isWorthBreakingCriticalEdge() 440 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in SinkInstruction() 540 if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in SinkInstruction()
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D | MachineVerifier.cpp | 87 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in addRegWithSubRegs() 521 if (!TargetRegisterInfo::isPhysicalRegister(*I)) { in visitMachineBasicBlockBefore() 640 else if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in visitMachineOperand() 682 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in visitMachineOperand() 737 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in visitMachineOperand() 1018 if (TargetRegisterInfo::isPhysicalRegister(LI.reg)) in verifyLiveIntervals() 1185 if (TargetRegisterInfo::isPhysicalRegister(LI.reg) && in verifyLiveIntervals()
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D | RegisterClassInfo.h | 104 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg)); in getLastCalleeSavedAlias()
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/external/llvm/lib/CodeGen/ |
D | DeadMachineInstructionElim.cpp | 81 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in isDead() 147 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction() 166 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in runOnMachineFunction()
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D | PeepholeOptimizer.cpp | 356 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) { in ValueTracker() 418 if (TargetRegisterInfo::isPhysicalRegister(DstReg) || in INITIALIZE_PASS_DEPENDENCY() 419 TargetRegisterInfo::isPhysicalRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY() 568 TargetRegisterInfo::isPhysicalRegister(SrcReg) || in optimizeCmpInstr() 569 (SrcReg2 != 0 && TargetRegisterInfo::isPhysicalRegister(SrcReg2))) in optimizeCmpInstr() 622 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in findNextSource() 634 if (TargetRegisterInfo::isPhysicalRegister(Pair.Reg)) in findNextSource() 681 if (TargetRegisterInfo::isPhysicalRegister(CurSrcPair.Reg)) in findNextSource() 930 assert(!TargetRegisterInfo::isPhysicalRegister(Def.Reg) && in RewriteSource() 1190 if (TargetRegisterInfo::isPhysicalRegister(MODef.getReg())) in optimizeCoalescableCopy() [all …]
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D | MachineInstr.cpp | 88 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in substPhysReg() 1008 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) || in isIdenticalTo() 1009 TargetRegisterInfo::isPhysicalRegister(OMO.getReg())) in isIdenticalTo() 1298 TargetRegisterInfo::isPhysicalRegister(MOReg) && in findRegisterUseOperandIdx() 1299 TargetRegisterInfo::isPhysicalRegister(Reg) && in findRegisterUseOperandIdx() 1342 bool isPhys = TargetRegisterInfo::isPhysicalRegister(Reg); in findRegisterDefOperandIdx() 1354 TargetRegisterInfo::isPhysicalRegister(MOReg)) { in findRegisterDefOperandIdx() 1492 if (TargetRegisterInfo::isPhysicalRegister(ToReg)) { in substituteRegister() 1778 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in print() 1943 bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); in addRegisterKilled() [all …]
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D | RegisterCoalescer.cpp | 325 if (TargetRegisterInfo::isPhysicalRegister(Src)) { in setRegisters() 326 if (TargetRegisterInfo::isPhysicalRegister(Dst)) in setRegisters() 335 if (TargetRegisterInfo::isPhysicalRegister(Dst)) { in setRegisters() 394 assert(!(TargetRegisterInfo::isPhysicalRegister(Dst) && DstSub) && in setRegisters() 402 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) in flip() 426 if (TargetRegisterInfo::isPhysicalRegister(DstReg)) { in isCoalescable() 427 if (!TargetRegisterInfo::isPhysicalRegister(Dst)) in isCoalescable() 766 if (TargetRegisterInfo::isPhysicalRegister(NewReg)) in removeCopyByCommutingDef() 867 assert(!TargetRegisterInfo::isPhysicalRegister(Reg) && in definesFullReg() 888 if (TargetRegisterInfo::isPhysicalRegister(SrcReg)) in reMaterializeTrivialDef() [all …]
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D | MachineInstrBundle.cpp | 149 assert(TargetRegisterInfo::isPhysicalRegister(Reg)); in finalizeBundle() 299 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && in analyzePhysReg() 313 if (!MOReg || !TargetRegisterInfo::isPhysicalRegister(MOReg)) in analyzePhysReg()
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D | RegAllocFast.cpp | 350 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && in usePhysReg() 535 if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) || in allocVirtReg() 609 if ((!Hint || !TargetRegisterInfo::isPhysicalRegister(Hint)) && in defineVirtReg() 738 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in handleThroughOperands() 793 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in handleThroughOperands() 852 assert(TargetRegisterInfo::isPhysicalRegister(i->PhysReg) && in AllocateBasicBlock() 1007 if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; in AllocateBasicBlock() 1039 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { in AllocateBasicBlock()
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D | ExpandPostRAPseudos.cpp | 95 assert(TargetRegisterInfo::isPhysicalRegister(DstReg) && in LowerSubregToReg() 97 assert(TargetRegisterInfo::isPhysicalRegister(InsReg) && in LowerSubregToReg()
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D | TwoAddressInstructionPass.cpp | 393 IsSrcPhys = TargetRegisterInfo::isPhysicalRegister(SrcReg); in isCopyToReg() 394 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in isCopyToReg() 450 if (TargetRegisterInfo::isPhysicalRegister(Reg) && in isKilled() 455 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in isKilled() 511 IsDstPhys = TargetRegisterInfo::isPhysicalRegister(DstReg); in findOnlyInterestingUse() 527 if (TargetRegisterInfo::isPhysicalRegister(Reg)) in getMappedReg() 1064 } else if (TargetRegisterInfo::isPhysicalRegister(MOReg)) { in rescheduleKillAboveMI() 1113 if (TargetRegisterInfo::isPhysicalRegister(MOReg) && in rescheduleKillAboveMI() 1734 TargetRegisterInfo::isPhysicalRegister(DstReg) || in eliminateRegSequence() 1784 if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg)) in eliminateRegSequence()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 166 if (TRI->isPhysicalRegister(Rd) || TRI->isPhysicalRegister(Ra)) { in addIntraChainConstraint() 167 DEBUG(dbgs() << "Rd is a physical reg:" << TRI->isPhysicalRegister(Rd) in addIntraChainConstraint() 169 DEBUG(dbgs() << "Ra is a physical reg:" << TRI->isPhysicalRegister(Ra) in addIntraChainConstraint()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonRDF.cpp | 42 if (!TargetRegisterInfo::isPhysicalRegister(RR.Reg)) { in covers()
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