| /external/clang/tools/libclang/ |
| D | CXCursor.h | 173 bool isPseudo() const { return C.data[1] != nullptr; } in isPseudo() function
175 assert(isPseudo()); in getAsMacroDefinition()
179 assert(!isPseudo()); in getAsMacroExpansion()
183 assert(isPseudo()); in getPseudoLoc()
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| D | CXCursor.cpp | 842 if (isPseudo()) in getName()
848 if (isPseudo()) in getDefinition()
853 if (isPseudo()) in getSourceRange()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64A53Fix835769.cpp | 159 if (!I.isPseudo()) in getLastNonPseudo()
218 if (!CurrInstr->isPseudo()) in runOnBasicBlock()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCShuffler.cpp | 36 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
60 assert(!HexagonMCInstrInfo::getDesc(MCII, *I.getInst()).isPseudo()); in init()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrFormats.td | 32 let isPseudo = 1;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | R600Instructions.td | 749 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in {
758 } // end let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1
968 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1024 let isPseudo = 1;
1287 let isPseudo = 1 in {
1348 } // End isPseudo = 1
1356 let usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU" in {
1367 } // end usesCustomInserter = 1, isCodeGenOnly = 1, isPseudo = 1, Namespace = "AMDGPU"
1487 let isPseudo = 1;
1599 let isPseudo = 1 in {
[all …]
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| D | SIInstrInfo.td | 698 let isPseudo = 1, isCodeGenOnly = 1 in {
720 let isPseudo = 1;
810 let isPseudo = 1;
894 let isPseudo = 1;
992 let isPseudo = 1;
1692 let isPseudo = 1;
1781 let isPseudo = 1;
1870 let isPseudo = 1;
2075 let isPseudo = 1, isCodeGenOnly = 1 in {
2281 let isPseudo = 1;
[all …]
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| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCInstrDesc.h | 282 bool isPseudo() const { in isPseudo() function
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonIntrinsicsV60.td | 27 let isPseudo = 1 in
33 let isPseudo = 1 in
40 let isPseudo = 1 in
46 let isPseudo = 1 in
52 let isPseudo = 1 in
58 let isPseudo = 1 in
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| D | HexagonInstrFormats.td | 357 let isCodeGenOnly = 1, isPseudo = 1 in
363 let isCodeGenOnly = 1, isPseudo = 1 in
369 let isCodeGenOnly = 1, isPseudo = 1 in
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| D | HexagonInstrInfoV5.td | 101 isCodeGenOnly = 1, isPseudo = 1 in
108 validSubTargets = HasV5SubT, isCodeGenOnly = 1, isPseudo = 1 in
115 hasSideEffects = 0, validSubTargets = HasV5SubT, isPseudo = 1 in
750 isPseudo = 1, InputType = "imm" in
758 isPseudo = 1, InputType = "imm" in
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| D | HexagonInstrInfoV60.td | 777 let isPseudo = 1, validSubTargets = HasV60SubT in
853 let isPseudo = 1, validSubTargets = HasV60SubT in
920 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
948 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
973 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
987 isCodeGenOnly = 1, isPseudo = 1, mayStore = 1, hasSideEffects = 0 in {
1002 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
1016 opExtentAlign = 2, isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
1034 let isCodeGenOnly = 1, isPseudo = 1, hasSideEffects = 0 in {
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| /external/llvm/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 200 if (!MI.isPseudo()) in runOnMachineFunction()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 208 bool isPseudo() const { return Flags & (1 << MCID::Pseudo); } in isPseudo() function
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | ExpandPostRAPseudos.cpp | 210 if (!MI->getDesc().isPseudo()) in runOnMachineFunction()
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsDelaySlotFiller.cpp | 149 || I->getDesc().isPseudo() in findDelayInstr()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiDelaySlotFiller.cpp | 167 FI == LastFiller || I->isPseudo()) in findDelayInstr()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CodeGenInstruction.h | 245 bool isPseudo; variable
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| D | PseudoLoweringEmitter.cpp | 95 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
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| D | InstrInfoEmitter.cpp | 271 if (Inst.isPseudo) OS << "|(1<<MCID::Pseudo)"; in emitRecord()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 254 bool isPseudo : 1; variable
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| D | PseudoLoweringEmitter.cpp | 142 if (Insn.isCodeGenOnly || Insn.isPseudo) in evaluateExpansion()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | Target.td | 337 bit isPseudo = 0; // Is this instruction a pseudo-instruction?
354 // FIXME: For now this is distinct from isPseudo, above, as code-gen-only
358 // the printer/emitter, we can remove this attribute and just use isPseudo.
391 bit isPseudo = 1;
589 let isCodeGenOnly = 1, isPseudo = 1, Namespace = "TargetOpcode" in {
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 409 (I->isBranch() && !I->isPseudo() && I->getOperand(1).isReg() && in genInstrWithNewOpc()
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| /external/llvm/include/llvm/Target/ |
| D | Target.td | 391 bit isPseudo = 0; // Is this instruction a pseudo-instruction?
411 // FIXME: For now this is distinct from isPseudo, above, as code-gen-only
415 // the printer/emitter, we can remove this attribute and just use isPseudo.
418 // isPseudo: Does not have encoding information and should be expanded,
501 bit isPseudo = 1;
780 let isCodeGenOnly = 1, isPseudo = 1, hasNoSchedulingInfo = 1,
922 bit isPseudo = 1;
|