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Searched refs:isRegMask (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/lib/CodeGen/
DLivePhysRegs.cpp55 } else if (O->isRegMask()) in stepBackward()
92 } else if (O->isRegMask()) in stepForward()
DRegUsageInfoPropagate.cpp66 if (MO.isRegMask()) in setRegMask()
DDeadMachineInstructionElim.cpp155 } else if (MO.isRegMask()) { in runOnMachineFunction()
DRegisterScavenging.cpp108 if (MO.isRegMask()) { in determineKillsAndDefs()
298 if (MO.isRegMask()) in findSurvivorReg()
DCriticalAntiDepBreaker.cpp248 if (MO.isRegMask()) in ScanInstruction()
349 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs()
DMachineCSE.cpp189 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) in isPhysDefTriviallyDead()
313 if (MO.isRegMask()) in PhysRegDefsReach()
DMachineInstrBundle.cpp304 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) { in analyzePhysReg()
DMachineCopyPropagation.cpp258 if (MO.isRegMask()) in CopyPropagateBlock()
DShrinkWrap.cpp239 } else if (MO.isRegMask()) { in INITIALIZE_PASS_DEPENDENCY()
DMachineInstr.cpp801 assert((isImpReg || Op.isRegMask() || MCID->isVariadic() || in addOperand()
1347 if (isPhys && Overlap && MO.isRegMask() && MO.clobbersPhysReg(Reg)) in findRegisterDefOperandIdx()
1658 if ((MO.isReg() && MO.isImplicit()) || MO.isRegMask()) in copyImplicitOps()
2109 if (MO.isRegMask()) { in setPhysRegsDeadExcept()
DVirtRegMap.cpp393 if (MO.isRegMask()) in rewrite()
DLiveDebugValues.cpp319 } else if (MO.isRegMask()) { in transferRegisterDef()
DEarlyIfConversion.cpp230 if (MO.isRegMask()) { in canSpeculateInstrs()
DBranchFolding.cpp1708 if (MO.isRegMask()) in findHoistingInsertPosAndDeps()
1819 if (MO.isRegMask()) { in HoistCommonCodeInSuccs()
DLiveIntervalAnalysis.cpp222 if (!MO.isRegMask()) in computeRegMasks()
938 if (MO.isRegMask()) in updateAllRanges()
DLiveVariables.cpp517 if (MO.isRegMask()) { in runOnInstr()
/external/llvm/lib/Target/X86/
DX86VZeroUpper.cpp132 if (MI.isCall() && MO.isRegMask() && !clobbersAllYmmRegs(MO)) in hasYmmReg()
148 if (!MO.isRegMask()) in callClobbersAnyYmmReg()
/external/llvm/lib/CodeGen/AsmPrinter/
DDbgValueHistoryCalculator.cpp171 } else if (MO.isRegMask()) { in collectChangingRegs()
201 } else if (MO.isRegMask()) { in calculateDbgValueHistory()
/external/llvm/include/llvm/CodeGen/
DMachineOperand.h254 bool isRegMask() const { return OpKind == MO_RegisterMask; } in isRegMask() function
489 assert(isRegMask() && "Wrong MachineOperand accessor"); in getRegMask()
542 assert(isRegMask() && "Wrong MachineOperand mutator"); in setRegMask()
/external/llvm/lib/Target/AArch64/
DAArch64A57FPLoadBalancing.cpp515 if (J.isRegMask()) in scavengeRegister()
576 } else if (U.isRegMask()) { in colorChain()
711 } else if (MO.isRegMask()) { in maybeKillChain()
DAArch64CollectLOH.cpp330 if (!MO.isRegMask()) in initReachingDef()
/external/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp627 } else if (MO.isRegMask()) { in clobbersCTR()
/external/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp473 if (MO.isRegMask() && MO.clobbersPhysReg(ARM::R12)) { in saveScavengerRegister()
/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.cpp362 if (MO.isRegMask() && MO.clobbersPhysReg(Lanai::SR)) { in optimizeCompareInstr()
/external/llvm/lib/CodeGen/MIRParser/
DMIRParser.cpp441 if (!MO.isRegMask()) in inferRegisterInfo()

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