/external/llvm/test/CodeGen/Hexagon/ |
D | alu64.ll | 247 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.ll(i32 %Rs, i32 %Rt) 255 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.hl(i32 %Rs, i32 %Rt) 263 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %Rs, i32 %Rt) 271 %0 = tail call i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32 %Rs, i32 %Rt) 343 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.ll(i32 %Rs, i32 %Rt) 351 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.hl(i32 %Rs, i32 %Rt) 359 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %Rs, i32 %Rt) 367 %0 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.hl(i32 %Rs, i32 %Rt) 561 declare i32 @llvm.hexagon.A2.addh.l16.ll(i32, i32) #1 562 declare i32 @llvm.hexagon.A2.addh.l16.hl(i32, i32) #1 [all …]
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/external/swiftshader/third_party/subzero/crosstest/ |
D | test_sync_atomic_main.cpp | 53 volatile uint16_t l16; member 273 testAtomicRMW<uint16_t>(&AtomicLocs.l16, TotalTests, Passes, Failures); in main() 277 testValCompareAndSwap<uint16_t>(&AtomicLocs.l16, TotalTests, Passes, in main() 283 testAtomicRMWThreads<uint16_t>(&AtomicLocs.l16, TotalTests, Passes, Failures); in main()
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/external/stressapptest/src/ |
D | os.cc | 764 uint16 l16; in PciRead() member 788 sat_assert(&(datacast.l16) == reinterpret_cast<uint16*>(&datacast)); in PciRead() 789 return datacast.l16; in PciRead() 801 uint16 l16; in PciWrite() member 816 sat_assert(&(datacast.l16) == reinterpret_cast<uint16*>(&datacast)); in PciWrite() 817 datacast.l16 = value; in PciWrite()
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/external/llvm/test/CodeGen/Hexagon/intrinsics/ |
D | xtype_alu.ll | 90 declare i32 @llvm.hexagon.A2.addh.l16.ll(i32, i32) 92 %z = call i32 @llvm.hexagon.A2.addh.l16.ll(i32 %a, i32 %b) 97 declare i32 @llvm.hexagon.A2.addh.l16.hl(i32, i32) 99 %z = call i32 @llvm.hexagon.A2.addh.l16.hl(i32 %a, i32 %b) 104 declare i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32, i32) 106 %z = call i32 @llvm.hexagon.A2.addh.l16.sat.ll(i32 %a, i32 %b) 111 declare i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32, i32) 113 %z = call i32 @llvm.hexagon.A2.addh.l16.sat.hl(i32 %a, i32 %b) 467 declare i32 @llvm.hexagon.A2.subh.l16.ll(i32, i32) 469 %z = call i32 @llvm.hexagon.A2.subh.l16.ll(i32 %a, i32 %b) [all …]
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/external/llvm/test/CodeGen/SystemZ/ |
D | frame-20.ll | 64 %l16 = load volatile double, double *%ptr 96 %acc16 = fsub double %l16, %acc15 193 %l16 = load volatile double, double *%ptr 224 %acc16 = fsub double %l16, %acc14 295 %l16 = load volatile double, double *%ptr 320 %acc16 = fsub double %l16, %acc8 380 %l16 = load volatile double, double *%ptr 404 %acc16 = fsub double %l16, %acc7
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-stackmap.ll | 227 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 229 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 246 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 248 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18…
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/external/llvm/test/CodeGen/PowerPC/ |
D | ppc64-stackmap.ll | 261 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 263 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 280 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18… 282 … i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18…
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/external/pdfium/third_party/libtiff/ |
D | tif_luv.c | 775 int16* l16 = (int16*) sp->tbuf; in L16toY() local 779 *yp++ = (float)LogL16toY(*l16++); in L16toY() 785 int16* l16 = (int16*) sp->tbuf; in L16toGry() local 789 double Y = LogL16toY(*l16++); in L16toGry() 797 int16* l16 = (int16*) sp->tbuf; in L16fromY() local 801 *l16++ = (int16) (LogL16fromY(*yp++, sp->encode_meth)); in L16fromY()
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/external/libvncserver/libvncserver/ |
D | websockets.c | 110 uint16_t l16; member 699 flength = WS_NTOH16(header->u.s16.l16); in webSocketsDecodeHybi() 810 header->u.s16.l16 = WS_HTON16((uint16_t)blen); in webSocketsEncodeHybi()
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/external/llvm/test/CodeGen/X86/ |
D | stackmap.ll | 279 … i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { 281 …6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) 298 … i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { 300 …6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
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/external/clang/test/CodeGenCXX/ |
D | mangle-ms-string-literals.cpp | 243 const char *l16 = "\x10"; variable
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/external/libvpx/libvpx/vpx_dsp/x86/ |
D | intrapred_sse2.asm | 786 mova m3, [leftq] ; l1 l2 ... l16 [byte] 791 punpcklbw m3, m1 ; m3:m5 l1 l2 ... l16 [word]
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/external/boringssl/src/util/fipstools/ |
D | delocate.peg.go | 445 goto l16 448 l16:
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/external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
D | Intrinsics.gen | 714 hexagon_A2_addh_l16_hl, // llvm.hexagon.A2.addh.l16.hl 715 hexagon_A2_addh_l16_ll, // llvm.hexagon.A2.addh.l16.ll 716 hexagon_A2_addh_l16_sat_hl, // llvm.hexagon.A2.addh.l16.sat.hl 717 hexagon_A2_addh_l16_sat_ll, // llvm.hexagon.A2.addh.l16.sat.ll 765 hexagon_A2_subh_l16_hl, // llvm.hexagon.A2.subh.l16.hl 766 hexagon_A2_subh_l16_ll, // llvm.hexagon.A2.subh.l16.ll 767 hexagon_A2_subh_l16_sat_hl, // llvm.hexagon.A2.subh.l16.sat.hl 768 hexagon_A2_subh_l16_sat_ll, // llvm.hexagon.A2.subh.l16.sat.ll 6772 "llvm.hexagon.A2.addh.l16.hl", 6773 "llvm.hexagon.A2.addh.l16.ll", [all …]
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/external/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/ |
D | Intrinsics.gen | 708 hexagon_A2_addh_l16_hl, // llvm.hexagon.A2.addh.l16.hl 709 hexagon_A2_addh_l16_ll, // llvm.hexagon.A2.addh.l16.ll 710 hexagon_A2_addh_l16_sat_hl, // llvm.hexagon.A2.addh.l16.sat.hl 711 hexagon_A2_addh_l16_sat_ll, // llvm.hexagon.A2.addh.l16.sat.ll 759 hexagon_A2_subh_l16_hl, // llvm.hexagon.A2.subh.l16.hl 760 hexagon_A2_subh_l16_ll, // llvm.hexagon.A2.subh.l16.ll 761 hexagon_A2_subh_l16_sat_hl, // llvm.hexagon.A2.subh.l16.sat.hl 762 hexagon_A2_subh_l16_sat_ll, // llvm.hexagon.A2.subh.l16.sat.ll 6732 "llvm.hexagon.A2.addh.l16.hl", 6733 "llvm.hexagon.A2.addh.l16.ll", [all …]
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/external/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/ |
D | Intrinsics.gen | 714 hexagon_A2_addh_l16_hl, // llvm.hexagon.A2.addh.l16.hl 715 hexagon_A2_addh_l16_ll, // llvm.hexagon.A2.addh.l16.ll 716 hexagon_A2_addh_l16_sat_hl, // llvm.hexagon.A2.addh.l16.sat.hl 717 hexagon_A2_addh_l16_sat_ll, // llvm.hexagon.A2.addh.l16.sat.ll 765 hexagon_A2_subh_l16_hl, // llvm.hexagon.A2.subh.l16.hl 766 hexagon_A2_subh_l16_ll, // llvm.hexagon.A2.subh.l16.ll 767 hexagon_A2_subh_l16_sat_hl, // llvm.hexagon.A2.subh.l16.sat.hl 768 hexagon_A2_subh_l16_sat_ll, // llvm.hexagon.A2.subh.l16.sat.ll 6772 "llvm.hexagon.A2.addh.l16.hl", 6773 "llvm.hexagon.A2.addh.l16.ll", [all …]
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/external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
D | Intrinsics.gen | 714 hexagon_A2_addh_l16_hl, // llvm.hexagon.A2.addh.l16.hl 715 hexagon_A2_addh_l16_ll, // llvm.hexagon.A2.addh.l16.ll 716 hexagon_A2_addh_l16_sat_hl, // llvm.hexagon.A2.addh.l16.sat.hl 717 hexagon_A2_addh_l16_sat_ll, // llvm.hexagon.A2.addh.l16.sat.ll 765 hexagon_A2_subh_l16_hl, // llvm.hexagon.A2.subh.l16.hl 766 hexagon_A2_subh_l16_ll, // llvm.hexagon.A2.subh.l16.ll 767 hexagon_A2_subh_l16_sat_hl, // llvm.hexagon.A2.subh.l16.sat.hl 768 hexagon_A2_subh_l16_sat_ll, // llvm.hexagon.A2.subh.l16.sat.ll 6772 "llvm.hexagon.A2.addh.l16.hl", 6773 "llvm.hexagon.A2.addh.l16.ll", [all …]
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