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Searched refs:loOperand (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/subzero/src/
DIcePhiLoweringImpl.h41 auto *DestLo = llvm::cast<Variable>(Target->loOperand(Dest)); in prelowerPhis32Bit()
49 PhiLo->addArgument(Target->loOperand(Src), Label); in prelowerPhis32Bit()
DIceTargetLoweringMIPS32.cpp2245 Operand *TargetMIPS32::loOperand(Operand *Operand) { in loOperand() function in Ice::MIPS32::TargetMIPS32
2469 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); in lowerInt64Arithmetic()
2481 Src0LoR = legalizeToReg(loOperand(Src0)); in lowerInt64Arithmetic()
2482 Src1LoR = legalizeToReg(loOperand(Src1)); in lowerInt64Arithmetic()
2496 Src0LoR = legalizeToReg(loOperand(Src0)); in lowerInt64Arithmetic()
2497 Src1LoR = legalizeToReg(loOperand(Src1)); in lowerInt64Arithmetic()
2508 Src0LoR = legalizeToReg(loOperand(Src0)); in lowerInt64Arithmetic()
2509 Src1LoR = legalizeToReg(loOperand(Src1)); in lowerInt64Arithmetic()
2523 Src0LoR = legalizeToReg(loOperand(Src0)); in lowerInt64Arithmetic()
2524 Src1LoR = legalizeToReg(loOperand(Src1)); in lowerInt64Arithmetic()
[all …]
DIceTargetLoweringARM32.cpp2096 Operand *TargetARM32::loOperand(Operand *Operand) { in loOperand() function in Ice::ARM32::TargetARM32
2567 div0Check(IceType_i64, loOperand(Src1), hiOperand(Src1)); in preambleDivRem()
2588 Int32Operands SrcsLo(loOperand(Src0), loOperand(Src1)); in lowerInt64Arithmetic()
2593 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); in lowerInt64Arithmetic()
3518 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); in lowerAssign()
3519 Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg | Legal_Flex); in lowerAssign()
3583 Src = loOperand(Src); in lowerInt1ForBranch()
3718 Operand *Lo = loOperand(Arg); in lowerCall()
3911 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); in lowerCast()
3963 auto *DestLo = llvm::cast<Variable>(loOperand(Dest)); in lowerCast()
[all …]
DIceTargetLoweringX86BaseImpl.h1383 TargetX86Base<TraitsType>::loOperand(Operand *Operand) {
1970 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
1972 Operand *Src0Lo = loOperand(Src0);
1974 Operand *Src1Lo = loOperand(Src1);
2853 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
2910 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
2957 Src0 = loOperand(Src0);
2966 Src0 = loOperand(Src0);
3156 SpillLo = loOperand(Src0RM);
3160 auto *DestLo = llvm::cast<Variable>(loOperand(Dest));
[all …]
DIceTargetLoweringX8632.cpp373 legalizeToReg(loOperand(Value), Traits::RegisterSet::Reg_eax); in moveReturnValueToRegister()
DIceTargetLoweringX86Base.h218 loOperand(Operand *Operand);
220 typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) { in loOperand() function
DIceTargetLoweringMIPS32.h711 Operand *loOperand(Operand *Operand);
DIceTargetLoweringARM32.h167 Operand *loOperand(Operand *Operand);