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Searched refs:logical_width0 (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen8_depth_state.c216 width = mt->logical_width0; in gen8_emit_depth_stencil_hiz()
418 uint32_t surface_width = ALIGN(mt->logical_width0, level == 0 ? 8 : 1); in gen8_hiz_exec()
456 unsigned rect_width = ALIGN(minify(mt->logical_width0, level), 8); in gen8_hiz_exec()
Dintel_mipmap_tree.c322 mt->logical_width0 = width0; in intel_miptree_create_layout()
476 mt->logical_width0, in intel_miptree_create_layout()
874 irb->mt->logical_width0 != width || in intel_update_winsys_renderbuffer_miptree()
1084 if (width != minify(mt->logical_width0, level - mt->first_level) || in intel_miptree_match_image()
1562 mt->logical_width0, in intel_miptree_alloc_mcs()
1699 unsigned z_width = mt->logical_width0; in intel_gen7_hiz_buf_create()
1788 unsigned z_width = mt->logical_width0; in intel_gen8_hiz_buf_create()
1896 mt->logical_width0, in intel_hiz_miptree_buf_create()
2418 src->logical_width0, src->logical_height0, in intel_miptree_updownsample()
2420 dst->logical_width0, dst->logical_height0, in intel_miptree_updownsample()
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Dgen7_misc_state.c98 width = mt->logical_width0; in gen7_emit_depth_stencil_hiz()
Dgen6_depth_state.c106 width = mt->logical_width0; in gen6_emit_depth_stencil_hiz()
Dbrw_clear.c124 mt->logical_width0, mt->logical_height0); in brw_fast_clear_depth()
Dintel_tex_image.c87 width = old_mt ? get_base_dim(old_mt->logical_width0, width, level) : in intel_miptree_create_for_teximage()
189 mt->logical_width0, mt->logical_height0, 1, in intel_set_texture_image_mt()
Dbrw_meta_util.c301 rb->Width = mt->logical_width0; in brw_get_rb_for_slice()
Dintel_mipmap_tree.h482 uint32_t logical_width0; member
Dintel_blit.c427 src_x + src_width == minify(src_mt->logical_width0, src_level)); in intel_miptree_copy()
Dbrw_wm_surface_state.c1645 param->size[0] = minify(mt->logical_width0, u->Level); in update_texture_image_param()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_mipmap_tree.h185 uint32_t logical_width0, logical_height0, logical_depth0; member
Dintel_mipmap_tree.c86 mt->logical_width0 = width0; in intel_miptree_create_layout()
463 if (width != mt->logical_width0 || in intel_miptree_match_image()