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/external/mesa3d/src/compiler/nir/
Dnir_lower_gs_intrinsics.c94 nir_intrinsic_instr *lowered = in rewrite_emit_vertex() local
97 nir_intrinsic_set_stream_id(lowered, nir_intrinsic_stream_id(intrin)); in rewrite_emit_vertex()
98 lowered->src[0] = nir_src_for_ssa(count); in rewrite_emit_vertex()
99 nir_builder_instr_insert(b, &lowered->instr); in rewrite_emit_vertex()
122 nir_intrinsic_instr *lowered = in rewrite_end_primitive() local
125 nir_intrinsic_set_stream_id(lowered, nir_intrinsic_stream_id(intrin)); in rewrite_end_primitive()
126 lowered->src[0] = nir_src_for_ssa(count); in rewrite_end_primitive()
127 nir_builder_instr_insert(b, &lowered->instr); in rewrite_end_primitive()
/external/llvm/test/CodeGen/AMDGPU/
Dendcf-loop-header.ll4 ; loop block. This intrinsic will be lowered to s_or_b64 by the code
9 ; This is was lowered from the llvm.SI.end.cf intrinsic:
Dtrunc-vector-store-assertion-failure.ll3 ; This tests for a bug in the SelectionDAG where custom lowered truncated
Dicmp-select-sete-reverse-args.ll3 ;Test that a select with reversed True/False values is correctly lowered
Dfcmp.ll17 ; This test checks that a setcc node with f32 operands is lowered to a
/external/elfutils/libdwfl/
Dlinux-pid-attach.c138 bool lowered = (addr & 4) != 0; in pid_memory_read() local
139 if (lowered) in pid_memory_read()
148 if (! lowered) in pid_memory_read()
151 if (lowered) in pid_memory_read()
/external/llvm/test/CodeGen/X86/
Dmacho-comdat.ll6 ; CHECK: LLVM ERROR: MachO doesn't support COMDATs, 'f' cannot be lowered.
Dstatepoint-far-call.ll3 ; are lowered correctly to an indirect call via a scratch register.
D2010-10-08-cmpxchg8b.ll4 ; On i386, i64 cmpxchg is lowered during legalize types to extract the
D2008-08-31-EH_RETURN32.ll1 ; Check that eh_return & unwind_init were properly lowered
/external/swiftshader/third_party/LLVM/test/CodeGen/MBlaze/
Dselect.ll1 ; Ensure that the select instruction is supported and is lowered to
Dmul64.ll1 ; Ensure that multiplication is lowered to function calls when the 64-bit
/external/llvm/test/DebugInfo/ARM/
Dline.test5 ; branch, then further lowered to CMPri + brcc but without the fidelity that
/external/llvm/test/DebugInfo/PowerPC/
Dline.test5 ; branch, then further lowered to cmplwi + brcc but without the fidelity that
/external/mesa3d/src/compiler/glsl/
Dlower_jumps.cpp641 ir_loop_jump* lowered = 0; in visit() local
642 lowered = new(ir) ir_loop_jump(ir_loop_jump::jump_break); in visit()
648 jumps[lower]->replace_with(lowered); in visit()
649 jumps[lower] = lowered; in visit()
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DREADME.txt73 SETO done (lowered)
74 SETUO done (lowered)
/external/swiftshader/third_party/subzero/tests_lit/asan_tests/
Dno_globals.ll4 ; global initializers to be lowered.
/external/llvm/test/Transforms/LowerSwitch/
D2014-06-11-SwitchDefaultUnreachableOpt.ll3 ; The switch is lowered with a single icmp.
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
D2008-08-31-EH_RETURN32.ll1 ; Check that eh_return & unwind_init were properly lowered
D2008-08-31-EH_RETURN64.ll1 ; Check that eh_return & unwind_init were properly lowered
D2010-10-08-cmpxchg8b.ll4 ; On i386, i64 cmpxchg is lowered during legalize types to extract the
Dvec_ins_extract-1.ll3 ; Inserts and extracts with variable indices must be lowered
/external/llvm/test/CodeGen/WebAssembly/
Dunreachable.ll4 ; Test that LLVM unreachable instruction and trap intrinsic are lowered to
Dphi.ll3 ; Test that phis are lowered.
/external/llvm/lib/Target/Mips/
DMipsCallingConv.td24 /// For example, this is true for i32's that were lowered from soft-float.
184 // legal and is lowered to i128 which is further lowered to a pair of i64's.
321 // f128 is not legal and is lowered to i128 which is further lowered to a pair

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