/external/valgrind/none/tests/x86/ |
D | insn_sse2.def | 2 addpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 4 addsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 6 andpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 8 andnpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 10 cmpeqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 12 cmpltpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5677,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 14 cmplepd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 16 cmpunordpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0x0000000000000000,0x00… 18 cmpneqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5679,1234.5678] => 1.uq[0xffffffffffffffff,0x0000… 20 cmpnltpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5679,1234.5677] => 1.uq[0xffffffffffffffff,0x0000… [all …]
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D | insn_sse.def | 2 addps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98… 4 addss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11… 6 andnps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 8 andps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 10 cmpeqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… 12 cmpeqss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] 14 cmpleps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… 16 cmpless m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] 18 cmpltps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5677,234.5679,234.5677,234.5679] =>… 20 cmpltss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] [all …]
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D | insn_ssse3.def | 5 psignb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69… 13 psignw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,907,0,-… 21 psignd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[9999,0,0,-22222] 29 pabsb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69,… 37 pabsw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,1000,0,1… 45 pabsd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[11111,0,0,1111] 140 palignr imm8[0] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 141 palignr imm8[1] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 142 palignr imm8[2] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 143 palignr imm8[3] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… [all …]
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D | insn_sse3.def | 1 addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 3 addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 5 haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 7 haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 9 hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] 11 hsubps m128.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] => 1.ps[-2.1,289.9,-21.09,-50.57] 13 lddqu m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[11111,22222,33333,44… 16 movshdup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[22222,22222,44444… 18 movsldup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[11111,11111,33333…
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D | gen_insn_test.pl | 17 m128 => "reg128_t",
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/external/valgrind/none/tests/amd64/ |
D | insn_sse2.def | 2 addpd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,9876.5432] 4 addsd m128.pd[1234.5678,8765.4321] xmm.pd[2222.2222,1111.1111] => 1.pd[3456.79,1111.1111] 6 andpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 8 andnpd m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 10 cmpeqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 12 cmpltpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5677,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 14 cmplepd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0xffffffffffffffff,0x00000… 16 cmpunordpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5678,1234.5679] => 1.uq[0x0000000000000000,0x00… 18 cmpneqpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5679,1234.5678] => 1.uq[0xffffffffffffffff,0x0000… 20 cmpnltpd m128.pd[1234.5678,1234.5678] xmm.pd[1234.5679,1234.5677] => 1.uq[0xffffffffffffffff,0x0000… [all …]
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D | insn_sse.def | 2 addps m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,90.11,65.43,98… 4 addss m128.ps[12.34,56.78,43.21,87.65] xmm.ps[44.44,33.33,22.22,11.11] => 1.ps[56.78,33.33,22.22,11… 6 andnps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420]… 8 andps m128.uq[0xfdb97531eca86420,0x0123456789abcdef] xmm.uq[0x0123456789abcdef,0xfdb97531eca86420] … 10 cmpeqps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… 12 cmpeqss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] 14 cmpleps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5678,234.5679,234.5678,234.5679] =>… 16 cmpless m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] 18 cmpltps m128.ps[234.5678,234.5678,234.5678,234.5678] xmm.ps[234.5677,234.5679,234.5677,234.5679] =>… 20 cmpltss m128.ps[1234.5678,0.0,0.0,0.0] xmm.ps[1234.5679,0.0,0.0,0.0] => 1.ud[0x00000000,0,0,0] [all …]
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D | insn_pclmulqdq.def | 5 pclmulqdq imm8[0] m128.uq[0x68aa8003296cd08e,0x3455400273642736] xmm.uq[0x1a2aa002185fd28a,0x0d1550… 6 pclmulqdq imm8[1] m128.uq[0x068aa801d41c9309,0xc3455401c0bc0875] xmm.uq[0xa1a2aa01c70bc327,0x90d155… 7 pclmulqdq imm8[16] m128.uq[0x4868aa81c3c78f2f,0xe4345541c8918684] xmm.uq[0x721a2aa1c2f68231,0xf90d1… 8 pclmulqdq imm8[17] m128.uq[0xbc868aa9cac23ef5,0x9e434555cc0ede67] xmm.uq[0x8f21a2abccb52e20,0x4790d… 13 pclmulqdq imm8[0] m128.uq[0xd22de3ca1ec569b6,0x6916f1e5ee1073ca] xmm.uq[0x348b78f3d5b5f8d4,0x1a45bc… 14 pclmulqdq imm8[1] m128.uq[0xcd22de3e4b721c9d,0xa6916f200c66cd3b] xmm.uq[0x9348b790ece1258e,0x49a45b… 15 pclmulqdq imm8[16] m128.uq[0x24d22de5893ce7ca,0x126916f3a34c32d4] xmm.uq[0x09348b7ab053d859,0xc49a4… 16 pclmulqdq imm8[17] m128.uq[0xa24d22dffe19947b,0x91269170d5ba892e] xmm.uq[0x489348b9498b0386,0x2449a… 21 pclmulqdq imm8[0] m128.uq[0x55eb1226952280ea,0x2af58914293eff64] xmm.uq[0x157ac48af34d3ea1,0xcabd62… 22 pclmulqdq imm8[1] m128.uq[0xa55eb123fed7ee11,0x92af5892d619b5f9] xmm.uq[0x8957ac4a41ba99ed,0x84abd6… [all …]
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D | insn_ssse3.def | 5 psignb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69… 13 psignw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,907,0,-… 21 psignd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[9999,0,0,-22222] 29 pabsb m128.ub[0,10,0,245,0,1,255,254,10,0,245,0,1,254,0] xmm.ub[0,41,79,119,161,199,241,23,0,31,69,… 37 pabsw m128.sw[0,1000,0,-1111,11,0,-11,0] xmm.sw[909,907,906,905,809,808,807,806] => 1.sw[0,1000,0,1… 45 pabsd m128.sd[-11111,0,0,1111] xmm.sd[-9999,-10101,-11111,-22222] => 1.sd[11111,0,0,1111] 140 palignr imm8[0] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 141 palignr imm8[1] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 142 palignr imm8[2] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… 143 palignr imm8[3] m128.uq[0x52709a3760e06be3,0x1d5727b3f0088d23] xmm.uq[0x6b0cea9ba5226106,0x2fd5541d… [all …]
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D | insn_sse3.def | 1 addsubpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[39.99,44.42] 3 addsubps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[39.99,44.42,39.97,48.84] 5 haddpd m128.pd[1.11,2.22] xmm.pd[41.1,42.2] => 1.pd[83.3,3.33] 7 haddps m128.ps[1.11,2.22,3.33,4.44] xmm.ps[41.1,42.2,43.3,44.4] => 1.ps[83.30,87.70,3.33,7.77] 9 hsubpd m128.pd[9.11,2.22] xmm.pd[41.1,42.2] => 1.pd[-1.1,6.89] 11 hsubps m128.ps[1.11,22.2,3.83,54.4] xmm.ps[41.1,43.2,434.3,144.4] => 1.ps[-2.1,289.9,-21.09,-50.57] 13 lddqu m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[11111,22222,33333,44… 16 movshdup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[22222,22222,44444… 18 movsldup m128.ud[11111,22222,33333,44444] xmm.ud[55555,66666,77777,88888] => 1.ud[11111,11111,33333…
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D | gen_insn_test.pl | 18 m128 => "reg128_t",
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/external/compiler-rt/lib/tsan/rtl/ |
D | tsan_rtl.cc | 36 typedef __m128i m128; typedef 680 const m128 access = _mm_cvtsi64_si128(a); in ContainsSameAccessFast() 686 const m128 addr0 = SHUF(access, access, 1, 1, 1, 1); in ContainsSameAccessFast() 688 const m128 shadow0 = _mm_load_si128((__m128i*)s); in ContainsSameAccessFast() 689 const m128 shadow1 = _mm_load_si128((__m128i*)s + 1); in ContainsSameAccessFast() 695 m128 addr_vect = SHUF(shadow0, shadow1, 1, 3, 1, 3); in ContainsSameAccessFast() 698 const m128 rw_mask1 = _mm_cvtsi64_si128(1<<15); in ContainsSameAccessFast() 699 const m128 rw_mask = SHUF(rw_mask1, rw_mask1, 0, 0, 0, 0); in ContainsSameAccessFast() 703 const m128 addr_res = _mm_cmpeq_epi32(addr0, addr_vect); in ContainsSameAccessFast() 705 const m128 epoch1 = _mm_cvtsi64_si128(sync_epoch); in ContainsSameAccessFast() [all …]
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/external/llvm/test/CodeGen/X86/ |
D | fold-load-vec.ll | 4 ; We should not fold movss into pshufd since pshufd expects m128 while movss
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/external/llvm/lib/Target/X86/ |
D | X86SchedHaswell.td | 1639 // m128,y,i. 1651 // y,y,m128,i. 1668 // m128,x,x. 1742 // x,m128. 1778 // y,m128. 1821 // x,m128. 2083 // x,m128.
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/external/valgrind/docs/internals/ |
D | 3_11_BUGSTATUS.txt | 422 3274 -> 3280 Accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
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/external/compiler-rt/lib/msan/tests/ |
D | msan_test.cc | 2694 TEST(MemorySanitizer, m128) { in TEST() argument
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/external/valgrind/ |
D | NEWS | 428 357932 amd64->IR: accept redundant REX prefixes for {minsd,maxsd} m128, xmm.
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