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Searched refs:m_tileTable (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Dciaddrlib.cpp471 (mode != m_tileTable[index].mode) || in HwlPostCheckTileIndex()
472 (macroTiled && pInfo->pipeConfig != m_tileTable[index].info.pipeConfig)) in HwlPostCheckTileIndex()
479 if ((pInfo->pipeConfig == m_tileTable[index].info.pipeConfig) && in HwlPostCheckTileIndex()
480 (mode == m_tileTable[index].mode) && in HwlPostCheckTileIndex()
481 (type == m_tileTable[index].type)) in HwlPostCheckTileIndex()
486 if (pInfo->tileSplitBytes == m_tileTable[index].info.tileSplitBytes) in HwlPostCheckTileIndex()
500 if (mode == m_tileTable[index].mode) in HwlPostCheckTileIndex()
508 if (mode == m_tileTable[index].mode && in HwlPostCheckTileIndex()
509 type == m_tileTable[index].type) in HwlPostCheckTileIndex()
668 ADDR_ASSERT(m_tileTable[14].mode == ADDR_TM_2D_TILED_THIN1); in HwlComputeFmaskInfo()
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Dsiaddrlib.cpp1738 *pTileInfo = m_tileTable[index].info; in HwlSetupTileInfo()
1739 pOut->tileType = m_tileTable[index].type; in HwlSetupTileInfo()
1744 *pTileInfo = m_tileTable[8].info; in HwlSetupTileInfo()
1745 pOut->tileType = m_tileTable[8].type; in HwlSetupTileInfo()
1755 *pTileInfo = m_tileTable[0].info; in HwlSetupTileInfo()
2352 return &m_tileTable[index]; in GetTileSetting()
2388 (mode != m_tileTable[index].mode) || in HwlPostCheckTileIndex()
2389 (macroTiled && !HwlTileInfoEqual(pInfo, &m_tileTable[index].info)))) in HwlPostCheckTileIndex()
2396 if (HwlTileInfoEqual(pInfo, &m_tileTable[index].info) && in HwlPostCheckTileIndex()
2397 (mode == m_tileTable[index].mode) && in HwlPostCheckTileIndex()
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Dsiaddrlib.h246 ADDR_TILECONFIG m_tileTable[TileTableSize]; variable