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Searched refs:macroAspectRatio (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Degbaddrlib.cpp746 pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, in HwlReduceBankWidthHeight()
853 … pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); in ComputeSurfaceAlignmentsMacroTiled()
868 pTileInfo->macroAspectRatio; in ComputeSurfaceAlignmentsMacroTiled()
878 pTileInfo->macroAspectRatio; in ComputeSurfaceAlignmentsMacroTiled()
971 switch (pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
986 if (pTileInfo->banks < pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
1063 bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; in ComputeSurfaceMipLevelTileMode()
1572 (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1574 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
2229 UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; in ComputeSurfaceCoordFromAddrMacroTiled()
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Dsiaddrlib.cpp2020 ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1); in HwlComputeSurfaceCoord2DFromBankPipe()
2154 ADDR_ASSERT(pTileInfo->macroAspectRatio > 1) in HwlPreAdjustBank()
2474 pInfo->macroAspectRatio = 1; in HwlSetupTileCfg()
2536 pCfg->info.macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; in ReadGbTileMode()
Dciaddrlib.cpp1291 pCfg->info.macroAspectRatio = 1; in ReadGbTileMode()
1386 pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect; in ReadGbMacroTileCfg()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_surface.c413 AddrTileInfoIn.macroAspectRatio = surf->mtilea; in radv_amdgpu_winsys_surface_init()
475 surf->mtilea = AddrSurfInfoOut.pTileInfo->macroAspectRatio; in radv_amdgpu_winsys_surface_init()
/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_surface.c447 AddrTileInfoIn.macroAspectRatio = surf->mtilea; in amdgpu_surface_init()
516 surf->mtilea = AddrSurfInfoOut.pTileInfo->macroAspectRatio; in amdgpu_surface_init()
/external/mesa3d/src/amd/addrlib/
Daddrinterface.h399 UINT_32 macroAspectRatio; ///< Macro tile aspect ratio. 1-1:1, 2-4:1, 4-16:1, 8-64:1 member