| /external/vixl/test/aarch64/ |
| D | test-abi.cc | 78 #define CHECK_NEXT_PARAMETER_MEM(type, mem_op, size) \ in TEST() argument
80 expected = GenericOperand(mem_op, size); \ in TEST()
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 3071 MemOperand mem_op = in DoLoadKeyedExternal() local
3079 __ Ldr(result.S(), mem_op); in DoLoadKeyedExternal()
3083 __ Ldr(result, mem_op); in DoLoadKeyedExternal()
3089 __ Ldrsb(result, mem_op); in DoLoadKeyedExternal()
3093 __ Ldrb(result, mem_op); in DoLoadKeyedExternal()
3096 __ Ldrsh(result, mem_op); in DoLoadKeyedExternal()
3099 __ Ldrh(result, mem_op); in DoLoadKeyedExternal()
3102 __ Ldrsw(result, mem_op); in DoLoadKeyedExternal()
3105 __ Ldr(result.W(), mem_op); in DoLoadKeyedExternal()
3177 MemOperand mem_op; in DoLoadKeyedFixedDouble() local
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1604 const MemOperand& mem_op) { in ComputeAddress() argument
1606 VIXL_ASSERT(mem_op.GetAddrMode() == Offset); in ComputeAddress()
1607 Register base = mem_op.GetBaseRegister(); in ComputeAddress()
1608 if (mem_op.IsImmediateOffset()) { in ComputeAddress()
1609 Add(dst, base, mem_op.GetOffset()); in ComputeAddress()
1611 VIXL_ASSERT(mem_op.IsRegisterOffset()); in ComputeAddress()
1612 Register reg_offset = mem_op.GetRegisterOffset(); in ComputeAddress()
1613 Shift shift = mem_op.GetShift(); in ComputeAddress()
1614 Extend extend = mem_op.GetExtend(); in ComputeAddress()
1617 Add(dst, base, Operand(reg_offset, extend, mem_op.GetShiftAmount())); in ComputeAddress()
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| D | operands-aarch64.cc | 500 GenericOperand::GenericOperand(const MemOperand& mem_op, size_t mem_op_size) in GenericOperand() argument
501 : cpu_register_(NoReg), mem_op_(mem_op), mem_op_size_(mem_op_size) { in GenericOperand()
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| D | simulator-aarch64.cc | 451 uint64_t Simulator::ComputeMemOperandAddress(const MemOperand& mem_op) const { in ComputeMemOperandAddress()
452 VIXL_ASSERT(mem_op.IsValid()); in ComputeMemOperandAddress()
453 int64_t base = ReadRegister<int64_t>(mem_op.GetBaseRegister()); in ComputeMemOperandAddress()
454 if (mem_op.IsImmediateOffset()) { in ComputeMemOperandAddress()
455 return base + mem_op.GetOffset(); in ComputeMemOperandAddress()
457 VIXL_ASSERT(mem_op.GetRegisterOffset().IsValid()); in ComputeMemOperandAddress()
458 int64_t offset = ReadRegister<int64_t>(mem_op.GetRegisterOffset()); in ComputeMemOperandAddress()
459 unsigned shift_amount = mem_op.GetShiftAmount(); in ComputeMemOperandAddress()
460 if (mem_op.GetShift() != NO_SHIFT) { in ComputeMemOperandAddress()
461 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount); in ComputeMemOperandAddress()
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| D | operands-aarch64.h | 899 GenericOperand(const MemOperand& mem_op,
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| D | simulator-aarch64.h | 1328 uint64_t ComputeMemOperandAddress(const MemOperand& mem_op) const;
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| D | macro-assembler-aarch64.h | 688 void ComputeAddress(const Register& dst, const MemOperand& mem_op);
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| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| D | sb_bc_decoder.cpp | 414 unsigned mem_op = (dw0 >> 8) & 0x7; in decode_fetch() local
416 if (mem_op == 4) { in decode_fetch()
419 } else if (mem_op == 5) in decode_fetch()
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| /external/kernel-headers/original/uapi/linux/ |
| D | perf_event.h | 897 __u64 mem_op:5, /* type of opcode */ member
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| /external/v8/src/crankshaft/arm/ |
| D | lithium-codegen-arm.cc | 458 MemOperand mem_op = ToMemOperand(op); in EmitLoadDoubleRegister() local
459 __ vldr(dbl_scratch, mem_op.rn(), mem_op.offset()); in EmitLoadDoubleRegister()
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| /external/v8/src/crankshaft/mips/ |
| D | lithium-codegen-mips.cc | 474 MemOperand mem_op = ToMemOperand(op); in EmitLoadDoubleRegister() local
475 __ ldc1(dbl_scratch, mem_op); in EmitLoadDoubleRegister()
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| /external/v8/src/crankshaft/mips64/ |
| D | lithium-codegen-mips64.cc | 457 MemOperand mem_op = ToMemOperand(op); in EmitLoadDoubleRegister() local
458 __ ldc1(dbl_scratch, mem_op); in EmitLoadDoubleRegister()
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