Home
last modified time | relevance | path

Searched refs:mullw (Results 1 – 19 of 19) sorted by relevance

/external/llvm/test/CodeGen/PowerPC/
Dvec_mul.ll15 ; CHECK-NOT: mullw
18 ; CHECK-LE-NOT: mullw
21 ; CHECK-VSX-NOT: mullw
24 ; CHECK-LE-VSX-NOT: mullw
34 ; CHECK-NOT: mullw
37 ; CHECK-LE-NOT: mullw
40 ; CHECK-VSX-NOT: mullw
43 ; CHECK-LE-VSX-NOT: mullw
54 ; CHECK-NOT: mullw
59 ; CHECK-LE-NOT: mullw
[all …]
/external/valgrind/none/tests/ppc64/
Djm-int.stdout.exp-LE-ISA3_090 mullw 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
91 mullw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
92 mullw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
93 mullw 0000001cbe991def, 0000000000000000 => 0000000000000000 (00000000 00000000)
94 mullw 0000001cbe991def, 0000001cbe991def => 10b568258f2e0521 (00000000 00000000)
95 mullw 0000001cbe991def, ffffffffffffffff => 000000004166e211 (00000000 00000000)
96 mullw ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000 00000000)
97 mullw ffffffffffffffff, 0000001cbe991def => 000000004166e211 (00000000 00000000)
98 mullw ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
319 mullw. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
Djm-int.stdout.exp90 mullw 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
91 mullw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
92 mullw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
93 mullw 0000001cbe991def, 0000000000000000 => 0000000000000000 (00000000 00000000)
94 mullw 0000001cbe991def, 0000001cbe991def => 10b568258f2e0521 (00000000 00000000)
95 mullw 0000001cbe991def, ffffffffffffffff => 000000004166e211 (00000000 00000000)
96 mullw ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000 00000000)
97 mullw ffffffffffffffff, 0000001cbe991def => 000000004166e211 (00000000 00000000)
98 mullw ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
Djm-int.stdout.exp-LE90 mullw 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)
91 mullw 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
92 mullw 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
93 mullw 0000001cbe991def, 0000000000000000 => 0000000000000000 (00000000 00000000)
94 mullw 0000001cbe991def, 0000001cbe991def => 10b568258f2e0521 (00000000 00000000)
95 mullw 0000001cbe991def, ffffffffffffffff => 000000004166e211 (00000000 00000000)
96 mullw ffffffffffffffff, 0000000000000000 => 0000000000000000 (00000000 00000000)
97 mullw ffffffffffffffff, 0000001cbe991def => 000000004166e211 (00000000 00000000)
98 mullw ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
319 mullw. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)
[all …]
/external/valgrind/none/tests/ppc32/
Djm-int.stdout.exp90 mullw 00000000, 00000000 => 00000000 (00000000 00000000)
91 mullw 00000000, 000f423f => 00000000 (00000000 00000000)
92 mullw 00000000, ffffffff => 00000000 (00000000 00000000)
93 mullw 000f423f, 00000000 => 00000000 (00000000 00000000)
94 mullw 000f423f, 000f423f => d4868b81 (00000000 00000000)
95 mullw 000f423f, ffffffff => fff0bdc1 (00000000 00000000)
96 mullw ffffffff, 00000000 => 00000000 (00000000 00000000)
97 mullw ffffffff, 000f423f => fff0bdc1 (00000000 00000000)
98 mullw ffffffff, ffffffff => 00000001 (00000000 00000000)
/external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
Dvec_mul.ll1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep mullw
/external/llvm/test/MC/PowerPC/
Dppc64-encoding.s407 # CHECK-BE: mullw 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd6]
408 # CHECK-LE: mullw 2, 3, 4 # encoding: [0xd6,0x21,0x43,0x7c]
409 mullw 2, 3, 4
410 # CHECK-BE: mullw. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xd7]
411 # CHECK-LE: mullw. 2, 3, 4 # encoding: [0xd7,0x21,0x43,0x7c]
412 mullw. 2, 3, 4
/external/v8/src/compiler/ppc/
Dcode-generator-ppc.cc1233 __ mullw(i.TempRegister(0), i.InputRegister(0), i.InputRegister(3)); in AssembleArchInstruction() local
1234 __ mullw(i.TempRegister(1), i.InputRegister(2), i.InputRegister(1)); in AssembleArchInstruction() local
1236 __ mullw(i.OutputRegister(0), i.InputRegister(0), i.InputRegister(2)); in AssembleArchInstruction() local
1387 __ mullw(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
1402 __ mullw(kScratchReg, in AssembleArchInstruction() local
1408 __ mullw(i.OutputRegister(0), in AssembleArchInstruction() local
1452 ASSEMBLE_MODULO(divw, mullw); in AssembleArchInstruction()
1468 ASSEMBLE_MODULO(divwu, mullw); in AssembleArchInstruction()
/external/llvm/test/MC/Disassembler/PowerPC/
Dppc64le-encoding.txt316 # CHECK: mullw 2, 3, 4
319 # CHECK: mullw. 2, 3, 4
Dppc64-encoding.txt319 # CHECK: mullw 2, 3, 4
322 # CHECK: mullw. 2, 3, 4
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCSchedule.td279 // mullw IntMulHW
DPPCInstrInfo.td1184 "mullw $rT, $rA, $rB", IntMulHW,
/external/v8/src/crankshaft/ppc/
Dlithium-codegen-ppc.cc956 __ mullw(result, result, ip); in DoModByConstI() local
1012 __ mullw(scratch, right_reg, scratch); in DoModI() local
1098 __ mullw(scratch, result, ip); in DoDivByConstI() local
1163 __ mullw(scratch, divisor, result); in DoDivI() local
1346 __ mullw(scratch, divisor, result); in DoFlooringDivI() local
1496 __ mullw(result, result, right); in DoMulI()
1499 __ mullw(result, left, right); in DoMulI()
/external/v8/src/ppc/
Dmacro-assembler-ppc.h103 #define Mul mullw
Dassembler-ppc.h824 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
Dconstants-ppc.h1997 V(mullw, MULLW, 0x7C0001D6) \
Dassembler-ppc.cc926 void Assembler::mullw(Register dst, Register src1, Register src2, OEBit o, in mullw() function in v8::internal::Assembler
/external/v8/src/full-codegen/ppc/
Dfull-codegen-ppc.cc1626 __ mullw(scratch1, left, ip); in EmitInlineSmiBinaryOp() local
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.td873 // and the record form is cracked (i.e. divw, mullw, etc.)
2489 "mullw", "$rT, $rA, $rB", IIC_IntMulHW,