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Searched refs:nir_imm_int (Results 1 – 25 of 37) sorted by relevance

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/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_nir_lower_txf_ms.c86 nir_ssa_def *x_tile = nir_ushr(b, x, nir_imm_int(b, tile_w_shift)); in vc4_nir_lower_txf_ms_instr()
87 nir_ssa_def *y_tile = nir_ushr(b, y, nir_imm_int(b, tile_h_shift)); in vc4_nir_lower_txf_ms_instr()
90 nir_imm_int(b, tile_size)), in vc4_nir_lower_txf_ms_instr()
92 nir_imm_int(b, (w_tiles * in vc4_nir_lower_txf_ms_instr()
95 nir_imm_int(b, (tile_w - 1) & ~1)); in vc4_nir_lower_txf_ms_instr()
97 nir_imm_int(b, (tile_h - 1) & ~1)); in vc4_nir_lower_txf_ms_instr()
100 … nir_imm_int(b, 2 * VC4_MAX_SAMPLES * sizeof(uint32_t))), in vc4_nir_lower_txf_ms_instr()
102 nir_imm_int(b, in vc4_nir_lower_txf_ms_instr()
110 nir_imm_int(b, 2)), in vc4_nir_lower_txf_ms_instr()
111 nir_imm_int(b, (1 << 2))), in vc4_nir_lower_txf_ms_instr()
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Dvc4_nir_lower_blend.c64 load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); in vc4_nir_get_dst_color()
173 nir_iand(b, src0, nir_imm_int(b, ~chan_mask)), in vc4_nir_set_packed_chan()
174 nir_iand(b, src1, nir_imm_int(b, chan_mask))); in vc4_nir_set_packed_chan()
188 return nir_imm_int(b, ~0); in vc4_blend_channel_i()
202 nir_imm_int(b, ~0), in vc4_blend_channel_i()
209 return nir_imm_int(b, 0); in vc4_blend_channel_i()
232 return nir_imm_int(b, ~0); in vc4_blend_channel_i()
326 nir_ssa_def *or1 = nir_ior(b, src, nir_ishl(b, src, nir_imm_int(b, 8))); in vc4_nir_splat()
327 return nir_ior(b, or1, nir_ishl(b, or1, nir_imm_int(b, 16))); in vc4_nir_splat()
342 nir_ssa_def *imm_0xff = nir_imm_int(b, 0xff); in vc4_do_blending_i()
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Dvc4_nir_lower_io.c60 nir_imm_int(b, 8 * chan), in vc4_nir_unpack_8i()
61 nir_imm_int(b, 8)); in vc4_nir_unpack_8i()
70 nir_imm_int(b, 16 * chan), in vc4_nir_unpack_16i()
71 nir_imm_int(b, 16)); in vc4_nir_unpack_16i()
79 return nir_iand(b, src, nir_imm_int(b, 0xffff)); in vc4_nir_unpack_16u()
81 return nir_ushr(b, src, nir_imm_int(b, 16)); in vc4_nir_unpack_16u()
120 temp = nir_ixor(b, vpm, nir_imm_int(b, 0x80808080)); in vc4_nir_get_vattr_channel_vpm()
198 intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); in vc4_nir_lower_vertex_attr()
345 nir_imm_int(b, 4))); in vc4_nir_lower_uniform()
/external/mesa3d/src/compiler/nir/
Dnir_lower_double_ops.c50 nir_ssa_def *new_hi = nir_bfi(b, nir_imm_int(b, 0x7ff00000), exp, hi); in set_exponent()
62 return nir_ubitfield_extract(b, hi, nir_imm_int(b, 20), nir_imm_int(b, 11)); in get_exponent()
78 nir_ssa_def *inf_hi = nir_ior(b, nir_imm_int(b, 0x7ff00000), zero_hi); in get_signed_inf()
79 return nir_pack_double_2x32_split(b, nir_imm_int(b, 0), inf_hi); in get_signed_inf()
97 res = nir_bcsel(b, nir_ior(b, nir_ige(b, nir_imm_int(b, 0), exp), in fix_inv_result()
114 nir_ssa_def *src_norm = set_exponent(b, src, nir_imm_int(b, 1023)); in lower_rcp()
126 nir_imm_int(b, 1023))); in lower_rcp()
175 nir_imm_int(b, 1023)); in lower_sqrt_rsq()
176 nir_ssa_def *even = nir_iand(b, unbiased_exp, nir_imm_int(b, 1)); in lower_sqrt_rsq()
177 nir_ssa_def *half = nir_ishr(b, unbiased_exp, nir_imm_int(b, 1)); in lower_sqrt_rsq()
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Dnir_lower_alu_to_scalar.c146 nir_extract_u16(b, instr->src[0].src.ssa, nir_imm_int(b, 0)); in lower_alu_instr_scalar()
148 nir_ior(b, nir_ishl(b, nir_channel(b, word, 1), nir_imm_int(b, 16)), in lower_alu_instr_scalar()
161 nir_extract_u8(b, instr->src[0].src.ssa, nir_imm_int(b, 0)); in lower_alu_instr_scalar()
163 nir_ior(b, nir_ior(b, nir_ishl(b, nir_channel(b, byte, 3), nir_imm_int(b, 24)), in lower_alu_instr_scalar()
164 nir_ishl(b, nir_channel(b, byte, 2), nir_imm_int(b, 16))), in lower_alu_instr_scalar()
165 nir_ior(b, nir_ishl(b, nir_channel(b, byte, 1), nir_imm_int(b, 8)), in lower_alu_instr_scalar()
Dnir_lower_gs_intrinsics.c80 nir_imm_int(b, b->shader->info->gs.vertices_out); in rewrite_emit_vertex()
103 nir_iadd(b, count, nir_imm_int(b, 1)), in rewrite_emit_vertex()
204 nir_store_var(&b, state.vertex_count_var, nir_imm_int(&b, 0), 0x1); in nir_lower_gs_intrinsics()
Dnir_lower_io.c102 nir_ssa_def *vtx = nir_imm_int(b, deref_array->base_offset); in get_io_offset()
119 return nir_imm_int(b, type_size(glsl_vec4_type()) * slot_offset); in get_io_offset()
123 nir_ssa_def *offset = nir_imm_int(b, 0); in get_io_offset()
134 nir_imm_int(b, size * deref_array->base_offset)); in get_io_offset()
138 nir_imul(b, nir_imm_int(b, size), in get_io_offset()
150 offset = nir_iadd(b, offset, nir_imm_int(b, field_offset)); in get_io_offset()
Dnir_lower_system_values.c91 nir_imm_int(b, b->shader->info->cs.local_size[0]); in convert_block()
93 nir_imm_int(b, b->shader->info->cs.local_size[1]); in convert_block()
Dnir_lower_idiv.c74 bf = nir_isub(bld, bf, nir_imm_int(bld, 2)); /* yes, really */ in convert_instr()
104 r = nir_ishr(bld, r, nir_imm_int(bld, 31)); in convert_instr()
Dnir_lower_samplers.c58 nir_imul(b, nir_imm_int(b, *array_elements), in calc_sampler_offsets()
110 indirect = nir_umin(b, indirect, nir_imm_int(b, array_elements - 1)); in lower_sampler()
Dnir_lower_returns.c192 nir_store_var(b, state->return_flag, nir_imm_int(b, NIR_FALSE), 1); in lower_returns_in_block()
196 nir_store_var(b, state->return_flag, nir_imm_int(b, NIR_TRUE), 1); in lower_returns_in_block()
Dnir_lower_patch_vertices.c41 nir_ssa_def *val = nir_imm_int(&b, patch_vertices); in nir_lower_tes_patch_vertices()
Dnir_lower_clip.c78 store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); in store_clipdist_output()
90 load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); in load_clipdist_input()
/external/mesa3d/src/intel/blorp/
Dblorp_blit.c210 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); in blorp_nir_tex()
226 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); in blorp_nir_txf()
245 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); in blorp_nir_txf_ms()
279 nir_ssa_def *masked = nir_iand(b, src, nir_imm_int(b, src_mask)); in nir_mask_shift_or()
283 shifted = nir_ishl(b, masked, nir_imm_int(b, src_left_shift)); in nir_mask_shift_or()
285 shifted = nir_ushr(b, masked, nir_imm_int(b, -src_left_shift)); in nir_mask_shift_or()
337 nir_ssa_def *x_W = nir_imm_int(b, 0); in blorp_nir_retile_y_to_w()
342 nir_ssa_def *y_W = nir_imm_int(b, 0); in blorp_nir_retile_y_to_w()
372 nir_ssa_def *x_Y = nir_imm_int(b, 0); in blorp_nir_retile_w_to_y()
378 nir_ssa_def *y_Y = nir_imm_int(b, 0); in blorp_nir_retile_w_to_y()
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_nir_tcs_workarounds.c82 load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); in load_output()
119 store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); in emit_quads_workaround()
Dbrw_nir_intrinsics.c51 return nir_imm_int(b, 0); in read_thread_local_id()
60 load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); in read_thread_local_id()
/external/mesa3d/src/amd/vulkan/
Dradv_meta_resolve_cs.c74 src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_resolve_compute_shader()
80 dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); in build_resolve_compute_shader()
95 tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_resolve_compute_shader()
124 nir_ssa_def *all_same = nir_ine(&b, &tex_all_same->dest.ssa, nir_imm_int(&b, 0)); in build_resolve_compute_shader()
137 tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(&b, i)); in build_resolve_compute_shader()
Dradv_meta_buffer.c27 nir_ssa_def *offset = nir_imul(&b, global_id, nir_imm_int(&b, 16)); in build_buffer_fill_shader()
32 dst_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_buffer_fill_shader()
39 load->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_buffer_fill_shader()
77 nir_ssa_def *offset = nir_imul(&b, global_id, nir_imm_int(&b, 16)); in build_buffer_copy_shader()
82 dst_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_buffer_copy_shader()
90 src_buf->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_buffer_copy_shader()
Dradv_meta_bufimage.c71 offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_itob_compute_shader()
77 stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); in build_nir_itob_compute_shader()
90 tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_itob_compute_shader()
266 offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_btoi_compute_shader()
272 stride->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); in build_nir_btoi_compute_shader()
293 tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_btoi_compute_shader()
461 src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_itoi_compute_shader()
467 dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); in build_nir_itoi_compute_shader()
482 tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_itoi_compute_shader()
642 clear_val->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); in build_nir_cleari_compute_shader()
/external/mesa3d/src/compiler/spirv/
Dvtn_variables.c56 return nir_imm_int(&b->nb, link.id * stride); in vtn_access_link_as_ssa()
61 nir_imm_int(&b->nb, stride)); in vtn_access_link_as_ssa()
316 array_index = nir_imm_int(&b->nb, 0); in get_vulkan_resource_index()
344 nir_ssa_def *offset = nir_imm_int(&b->nb, 0); in vtn_access_chain_to_offset()
370 nir_imm_int(&b->nb, type->offsets[member])); in vtn_access_chain_to_offset()
494 nir_imm_int(&b->nb, access_offset))); in _vtn_load_store_tail()
509 (*inout)->def = nir_ine(&b->nb, (*inout)->def, nir_imm_int(&b->nb, 0)); in _vtn_load_store_tail()
559 nir_imm_int(&b->nb, i * type->stride)); in _vtn_block_load_store()
596 nir_imm_int(&b->nb, i * type->stride)); in _vtn_block_load_store()
651 nir_iadd(&b->nb, offset, nir_imm_int(&b->nb, i * type->stride)); in _vtn_block_load_store()
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Dvtn_cfg.c549 nir_store_var(&b->nb, switch_fall_var, nir_imm_int(&b->nb, NIR_FALSE), 1); in vtn_emit_branch()
676 nir_store_var(&b->nb, do_cont, nir_imm_int(&b->nb, NIR_FALSE), 1); in vtn_emit_cf_list()
687 nir_store_var(&b->nb, do_cont, nir_imm_int(&b->nb, NIR_TRUE), 1); in vtn_emit_cf_list()
705 nir_store_var(&b->nb, fall_var, nir_imm_int(&b->nb, NIR_FALSE), 1); in vtn_emit_cf_list()
728 nir_ieq(&b->nb, sel, nir_imm_int(&b->nb, *val)); in vtn_emit_cf_list()
756 nir_store_var(&b->nb, fall_var, nir_imm_int(&b->nb, NIR_TRUE), 1); in vtn_emit_cf_list()
Dvtn_glsl450.c344 nir_ssa_def *exponent_shift = nir_imm_int(b, 23); in build_frexp()
345 nir_ssa_def *exponent_bias = nir_imm_int(b, -126); in build_frexp()
347 nir_ssa_def *sign_mantissa_mask = nir_imm_int(b, 0x807fffffu); in build_frexp()
350 nir_ssa_def *exponent_value = nir_imm_int(b, 0x3f000000u); in build_frexp()
/external/mesa3d/src/intel/vulkan/
Danv_nir_apply_pipeline_layout.c122 block_index = nir_umin(b, block_index, nir_imm_int(b, array_size - 1)); in lower_res_index_intrinsic()
124 block_index = nir_iadd(b, nir_imm_int(b, surface_index), block_index); in lower_res_index_intrinsic()
145 nir_iadd(b, nir_imm_int(b, deref_array->base_offset), in lower_tex_deref()
149 index = nir_umin(b, index, nir_imm_int(b, array_size - 1)); in lower_tex_deref()
Danv_nir_lower_input_attachments.c99 tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); in try_lower_input_load()
/external/mesa3d/src/gallium/auxiliary/nir/
Dtgsi_to_nir.c649 nir_src_for_ssa(nir_imm_int(b, dim->Index - 1)); in ttn_src_for_file_and_index()
657 offset = nir_imm_int(b, index); in ttn_src_for_file_and_index()
662 offset = nir_ishl(b, offset, nir_imm_int(b, 4)); in ttn_src_for_file_and_index()
668 offset = nir_imm_int(b, 0); in ttn_src_for_file_and_index()
1067 nir_ine(b, src[0], nir_imm_int(b, 0)), in ttn_ucmp()
1085 nir_imm_int(b, 0)); in ttn_kill_if()
1102 if_stmt->condition = nir_src_for_ssa(nir_ine(b, src, nir_imm_int(b, 0))); in ttn_if()
1104 if_stmt->condition = nir_src_for_ssa(nir_fne(b, src, nir_imm_int(b, 0))); in ttn_if()
1966 store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); in ttn_add_output_stores()

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