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Searched refs:num_pipes (Results 1 – 9 of 9) sorted by relevance

/external/libdrm/radeon/
Dradeon_surface.c107 uint32_t num_pipes; member
224 surf_man->hw_info.num_pipes = 1; in r6_init_hw_info()
227 surf_man->hw_info.num_pipes = 2; in r6_init_hw_info()
230 surf_man->hw_info.num_pipes = 4; in r6_init_hw_info()
233 surf_man->hw_info.num_pipes = 8; in r6_init_hw_info()
236 surf_man->hw_info.num_pipes = 8; in r6_init_hw_info()
379 yalign = tilew * surf_man->hw_info.num_pipes; in r6_surface_init_2d()
385 MAX2(surf_man->hw_info.num_pipes * in r6_surface_init_2d()
509 surf_man->hw_info.num_pipes = 1; in eg_init_hw_info()
512 surf_man->hw_info.num_pipes = 2; in eg_init_hw_info()
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/external/mesa3d/src/amd/addrlib/inc/chip/r800/
Dsi_gb_reg.h46 unsigned int num_pipes : 3; member
84 unsigned int num_pipes : 3; member
/external/mesa3d/src/amd/vulkan/
Dradv_image.c522 unsigned num_pipes = device->physical_device->rad_info.num_tile_pipes; in radv_image_get_cmask_info() local
525 switch (num_pipes) { in radv_image_get_cmask_info()
547 unsigned base_align = num_pipes * pipe_interleave_bytes; in radv_image_get_cmask_info()
595 unsigned num_pipes = device->physical_device->rad_info.num_tile_pipes; in radv_image_get_htile_size() local
605 if (device->physical_device->rad_info.chip_class >= CIK && num_pipes < 4) in radv_image_get_htile_size()
606 num_pipes = 4; in radv_image_get_htile_size()
608 switch (num_pipes) { in radv_image_get_htile_size()
640 base_align = num_pipes * pipe_interleave_bytes; in radv_image_get_htile_size()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_query.c57 q->num_pipes = r300screen->info.r300_num_z_pipes; in r300_create_query()
59 q->num_pipes = r300screen->info.r300_num_gb_pipes; in r300_create_query()
Dr300_context.h289 unsigned num_pipes; member
Dr300_emit.c768 query->num_results += query->num_pipes; in r300_emit_query_end()
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_texture.c666 unsigned num_pipes = rscreen->info.num_tile_pipes; in r600_texture_get_cmask_info() local
669 unsigned elements_per_macro_tile = (cmask_cache_bits / element_bits) * num_pipes; in r600_texture_get_cmask_info()
678 unsigned base_align = num_pipes * pipe_interleave_bytes; in r600_texture_get_cmask_info()
696 unsigned num_pipes = rscreen->info.num_tile_pipes; in si_texture_get_cmask_info() local
699 switch (num_pipes) { in si_texture_get_cmask_info()
721 unsigned base_align = num_pipes * pipe_interleave_bytes; in si_texture_get_cmask_info()
796 unsigned num_pipes = rscreen->info.num_tile_pipes; in r600_texture_get_htile_size() local
823 if (rscreen->chip_class >= CIK && num_pipes < 4) in r600_texture_get_htile_size()
824 num_pipes = 4; in r600_texture_get_htile_size()
826 switch (num_pipes) { in r600_texture_get_htile_size()
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/external/mesa3d/src/gallium/drivers/r600/
Devergreen_compute.c386 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in evergreen_emit_dispatch() local
387 unsigned wave_divisor = (16 * num_pipes); in evergreen_emit_dispatch()
410 num_pipes, num_waves, lds_size); in evergreen_emit_dispatch()
Devergreen_state.c3689 unsigned num_pipes = rctx->screen->b.info.r600_max_quad_pipes; in evergreen_setup_tess_constants() local
3690 unsigned wave_divisor = (16 * num_pipes); in evergreen_setup_tess_constants()