Searched refs:printAndVerify (Results 1 – 7 of 7) sorted by relevance
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXTargetMachine.cpp | 77 void printAndVerify(PassManagerBase &PM, in printAndVerify() function
264 printAndVerify(PM, "After Instruction Selection"); in addCommonCodeGenPasses()
272 printAndVerify(PM, "After Pre-RegAlloc TailDuplicate"); in addCommonCodeGenPasses()
290 printAndVerify(PM, "After codegen DCE pass"); in addCommonCodeGenPasses()
295 printAndVerify(PM, "After Machine LICM, CSE and Sinking passes"); in addCommonCodeGenPasses()
298 printAndVerify(PM, "After codegen peephole optimization pass"); in addCommonCodeGenPasses()
303 printAndVerify(PM, "After PreRegAlloc passes"); in addCommonCodeGenPasses()
307 printAndVerify(PM, "After Register Allocation"); in addCommonCodeGenPasses()
320 printAndVerify(PM, "After StackSlotColoring and postra Machine LICM"); in addCommonCodeGenPasses()
325 printAndVerify(PM, "After PostRegAlloc passes"); in addCommonCodeGenPasses()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | LLVMTargetMachine.cpp | 280 static void printAndVerify(PassManagerBase &PM, in printAndVerify() function
387 printAndVerify(PM, "After Instruction Selection"); in addCommonCodeGenPasses()
395 printAndVerify(PM, "After Pre-RegAlloc TailDuplicate"); in addCommonCodeGenPasses()
414 printAndVerify(PM, "After codegen DCE pass"); in addCommonCodeGenPasses()
422 printAndVerify(PM, "After Machine LICM, CSE and Sinking passes"); in addCommonCodeGenPasses()
425 printAndVerify(PM, "After codegen peephole optimization pass"); in addCommonCodeGenPasses()
430 printAndVerify(PM, "After PreRegAlloc passes"); in addCommonCodeGenPasses()
434 printAndVerify(PM, "After Register Allocation"); in addCommonCodeGenPasses()
447 printAndVerify(PM, "After StackSlotColoring and postra Machine LICM"); in addCommonCodeGenPasses()
452 printAndVerify(PM, "After PostRegAlloc passes"); in addCommonCodeGenPasses()
[all …]
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 328 printAndVerify("After Machine Scheduling"); in addOptimizedRegAlloc()
336 printAndVerify("After StackSlotColoring"); in addOptimizedRegAlloc()
342 printAndVerify("After Pre-RegAlloc TailDuplicate"); in addMachineSSAOptimization()
361 printAndVerify("After codegen DCE pass"); in addMachineSSAOptimization()
367 printAndVerify("After ILP optimizations"); in addMachineSSAOptimization()
373 printAndVerify("After Machine LICM, CSE and Sinking passes"); in addMachineSSAOptimization()
376 printAndVerify("After codegen peephole optimization pass"); in addMachineSSAOptimization()
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| /external/llvm/tools/llc/ |
| D | llc.cpp | 419 TPC->printAndVerify(""); in compileModule()
441 TPC->printAndVerify(Banner); in compileModule()
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| /external/llvm/include/llvm/CodeGen/ |
| D | TargetPassConfig.h | 257 void printAndVerify(const std::string &Banner);
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| /external/llvm/lib/CodeGen/ |
| D | TargetPassConfig.cpp | 405 void TargetPassConfig::printAndVerify(const std::string &Banner) { in printAndVerify() function in TargetPassConfig
576 printAndVerify("After Instruction Selection"); in addMachinePasses()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonTargetMachine.cpp | 258 printAndVerify("After hexagon peephole pass"); in addInstSelector()
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