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Searched refs:psllw (Results 1 – 25 of 99) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dvector-shift-shl-128.ll152 ; SSE2-NEXT: psllw $12, %xmm1
157 ; SSE2-NEXT: psllw $8, %xmm0
165 ; SSE2-NEXT: psllw $4, %xmm0
173 ; SSE2-NEXT: psllw $2, %xmm0
180 ; SSE2-NEXT: psllw $1, %xmm0
189 ; SSE41-NEXT: psllw $12, %xmm0
190 ; SSE41-NEXT: psllw $4, %xmm1
195 ; SSE41-NEXT: psllw $8, %xmm4
199 ; SSE41-NEXT: psllw $4, %xmm1
203 ; SSE41-NEXT: psllw $2, %xmm1
[all …]
Dvec_shift4.ll37 ; X32-NEXT: psllw $5, %xmm1
39 ; X32-NEXT: psllw $4, %xmm3
44 ; X32-NEXT: psllw $2, %xmm3
60 ; X64-NEXT: psllw $5, %xmm1
62 ; X64-NEXT: psllw $4, %xmm3
67 ; X64-NEXT: psllw $2, %xmm3
D2011-12-15-vec_shift.ll9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]]
11 ; CHECK-W-SSE4: psllw $2
14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
Dvector-rotate-128.ll261 ; SSE2-NEXT: psllw $12, %xmm1
265 ; SSE2-NEXT: psllw $8, %xmm4
274 ; SSE2-NEXT: psllw $4, %xmm2
282 ; SSE2-NEXT: psllw $2, %xmm2
289 ; SSE2-NEXT: psllw $1, %xmm2
291 ; SSE2-NEXT: psllw $12, %xmm3
332 ; SSE41-NEXT: psllw $12, %xmm0
333 ; SSE41-NEXT: psllw $4, %xmm1
338 ; SSE41-NEXT: psllw $8, %xmm6
343 ; SSE41-NEXT: psllw $4, %xmm1
[all …]
Dvector-bitreverse.ll1030 ; SSE2-NEXT: psllw $7, %xmm2
1035 ; SSE2-NEXT: psllw $5, %xmm3
1039 ; SSE2-NEXT: psllw $3, %xmm4
1114 ; SSE2-NEXT: psllw $7, %xmm0
1119 ; SSE2-NEXT: psllw $5, %xmm0
1123 ; SSE2-NEXT: psllw $3, %xmm3
1205 ; SSE2-NEXT: psllw $7, %xmm0
1210 ; SSE2-NEXT: psllw $5, %xmm0
1214 ; SSE2-NEXT: psllw $3, %xmm3
1298 ; SSE2-NEXT: psllw $7, %xmm0
[all …]
Dvshift-1.ll54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
Dvec_shift.ll8 ; X32-NEXT: psllw %xmm1, %xmm0
13 ; X64-NEXT: psllw %xmm1, %xmm0
Dvshift-4.ll66 ; CHECK: psllw
77 ; CHECK: psllw
Dmachine-cp.ll68 ; CHECK: psllw $7,
69 ; CHECK: psllw $7, [[SRC1:%xmm[0-9]+]]
Dvector-shift-lshr-128.ll195 ; SSE2-NEXT: psllw $12, %xmm1
232 ; SSE41-NEXT: psllw $12, %xmm0
233 ; SSE41-NEXT: psllw $4, %xmm1
304 ; X32-SSE-NEXT: psllw $12, %xmm1
343 ; SSE2-NEXT: psllw $5, %xmm1
375 ; SSE41-NEXT: psllw $5, %xmm1
437 ; X32-SSE-NEXT: psllw $5, %xmm1
606 ; SSE2-NEXT: psllw $5, %xmm2
640 ; SSE41-NEXT: psllw $5, %xmm1
735 ; X32-SSE-NEXT: psllw $5, %xmm2
[all …]
/external/llvm/test/Analysis/CostModel/X86/
Dtestshiftshl.ll34 ; SSE2-CODEGEN: psllw
46 ; SSE2-CODEGEN: psllw
58 ; SSE2-CODEGEN: psllw
214 ; SSE2-CODEGEN: psllw
226 ; SSE2-CODEGEN: psllw
238 ; SSE2-CODEGEN: psllw
276 ; SSE2-CODEGEN: psllw $3
290 ; SSE2-CODEGEN: psllw $3
306 ; SSE2-CODEGEN: psllw $3
490 ; SSE2-CODEGEN: psllw $3
[all …]
/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_txfm_ssse3_x86_64.asm52 psllw m0, 2
53 psllw m1, 2
54 psllw m2, 2
55 psllw m3, 2
56 psllw m4, 2
57 psllw m5, 2
58 psllw m6, 2
59 psllw m7, 2
Dhighbd_intrapred_sse2.asm269 psllw m3, m4
314 psllw m3, m4
351 psllw m3, m4
399 psllw m5, m6
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_sse2.asm63 psllw m0, 2
64 psllw m1, 2
/external/libvpx/libvpx/vp8/encoder/x86/
Ddct_sse2.asm90 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3
91 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3
225 psllw xmm5, 3
226 psllw xmm4, 3
228 psllw xmm0, 3
229 psllw xmm1, 3
Dfwalsh_sse2.asm48 psllw xmm0, 2 ; d1 a1
49 psllw xmm2, 2 ; c1 b1
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dvshift-1.ll54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
Dvshift-4.ll61 ; CHECK: psllw
72 ; CHECK: psllw
Dx86-shifts.ll65 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
/external/valgrind/none/tests/x86/
Dinsn_mmx.def58 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
59 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
60 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
/external/valgrind/none/tests/amd64/
Dinsn_mmx.def78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
79 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
80 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
/external/swiftshader/src/Reactor/
Dx86.hpp77 RValue<Short4> psllw(RValue<Short4> x, unsigned char y);
78 RValue<Short8> psllw(RValue<Short8> x, unsigned char y);
/external/swiftshader/third_party/LLVM/test/MC/X86/
Dx86-32-coverage.s687 psllw %mm3,%mm3
690 psllw %xmm5,%xmm5
693 psllw $0x7f,%mm3
696 psllw $0x7f,%xmm5
5806 psllw 0xdeadbeef(%ebx,%ecx,8),%mm3
5810 psllw 0x45,%mm3
5814 psllw 0x7eed,%mm3
5818 psllw 0xbabecafe,%mm3
5822 psllw 0x12345678,%mm3
5826 psllw %mm3,%mm3
[all …]
/external/llvm/test/MC/X86/
Dx86-32-coverage.s4181 psllw 0xdeadbeef(%ebx,%ecx,8),%mm3
4185 psllw 0x45,%mm3
4189 psllw 0x7eed,%mm3
4193 psllw 0xbabecafe,%mm3
4197 psllw 0x12345678,%mm3
4201 psllw %mm3,%mm3
4205 psllw 0xdeadbeef(%ebx,%ecx,8),%xmm5
4209 psllw 0x45,%xmm5
4213 psllw 0x7eed,%xmm5
4217 psllw 0xbabecafe,%xmm5
[all …]
/external/v8/src/x64/
Dsse-instr.h31 V(psllw, 66, 0F, F1) \

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