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/external/valgrind/none/tests/arm/
Dv6media.c152 TESTINST3("mul r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
153 TESTINST3("mul r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
154 TESTINST3("mul r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
155 TESTINST3("mul r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
156 TESTINST3("mul r0, r1, r2", 0x7fffffff, 0x7fffffff, r0, r1, r2, 0); in main()
157 TESTINST3("mul r0, r1, r2", 0x0000ffff, 0x0000ffff, r0, r1, r2, 0); in main()
161 TESTINST3("muls r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
162 TESTINST3("muls r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
163 TESTINST3("muls r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
164 TESTINST3("muls r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
[all …]
Dv6intARM.c144 TESTINST2("mov r0, r1", 1, r0, r1, 0); in main()
145 TESTINST2("cpy r0, r1", 1, r0, r1, 0); in main()
146 TESTINST2("mov r0, #0", 0, r0, r1, 0); in main()
147 TESTINST2("mov r0, #1", 0, r0, r1, 0); in main()
149 TESTINST2("movs r0, r1", 1, r0, r1, c); in main()
150 TESTINST2("movs r0, r1", 0, r0, r1, c); in main()
151 TESTINST2("movs r0, r1", 0x80000000, r0, r1, c); in main()
152 TESTINST2("movs r0, #0", 0, r0, r1, c); in main()
153 TESTINST2("movs r0, #1", 0, r0, r1, c); in main()
157 TESTINST2("mvn r0, r1", 1, r0, r1, 0); in main()
[all …]
/external/llvm/test/MC/SystemZ/
Dinsn-good-z196.s4 #CHECK: aghik %r0, %r0, -32768 # encoding: [0xec,0x00,0x80,0x00,0x00,0xd9]
5 #CHECK: aghik %r0, %r0, -1 # encoding: [0xec,0x00,0xff,0xff,0x00,0xd9]
6 #CHECK: aghik %r0, %r0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0xd9]
7 #CHECK: aghik %r0, %r0, 1 # encoding: [0xec,0x00,0x00,0x01,0x00,0xd9]
8 #CHECK: aghik %r0, %r0, 32767 # encoding: [0xec,0x00,0x7f,0xff,0x00,0xd9]
9 #CHECK: aghik %r0, %r15, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0xd9]
10 #CHECK: aghik %r15, %r0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0xd9]
13 aghik %r0, %r0, -32768
14 aghik %r0, %r0, -1
15 aghik %r0, %r0, 0
[all …]
Dinsn-bad-z196.s6 #CHECK: aghik %r0, %r1, -32769
8 #CHECK: aghik %r0, %r1, 32768
10 #CHECK: aghik %r0, %r1, foo
12 aghik %r0, %r1, -32769
13 aghik %r0, %r1, 32768
14 aghik %r0, %r1, foo
17 #CHECK: ahik %r0, %r1, -32769
19 #CHECK: ahik %r0, %r1, 32768
21 #CHECK: ahik %r0, %r1, foo
23 ahik %r0, %r1, -32769
[all …]
Dinsn-bad.s6 #CHECK: a %r0, -1
8 #CHECK: a %r0, 4096
10 a %r0, -1
11 a %r0, 4096
30 #CHECK: afi %r0, (-1 << 31) - 1
32 #CHECK: afi %r0, (1 << 31)
34 afi %r0, (-1 << 31) - 1
35 afi %r0, (1 << 31)
38 #CHECK: ag %r0, -524289
40 #CHECK: ag %r0, 524288
[all …]
Dinsn-good.s4 #CHECK: a %r0, 0 # encoding: [0x5a,0x00,0x00,0x00]
5 #CHECK: a %r0, 4095 # encoding: [0x5a,0x00,0x0f,0xff]
6 #CHECK: a %r0, 0(%r1) # encoding: [0x5a,0x00,0x10,0x00]
7 #CHECK: a %r0, 0(%r15) # encoding: [0x5a,0x00,0xf0,0x00]
8 #CHECK: a %r0, 4095(%r1,%r15) # encoding: [0x5a,0x01,0xff,0xff]
9 #CHECK: a %r0, 4095(%r15,%r1) # encoding: [0x5a,0x0f,0x1f,0xff]
12 a %r0, 0
13 a %r0, 4095
14 a %r0, 0(%r1)
15 a %r0, 0(%r15)
[all …]
/external/llvm/test/MC/ARM/
Darm-shift-encoding.s3 ldr r0, [r0, r0]
4 ldr r0, [r0, r0, lsr #32]
5 ldr r0, [r0, r0, lsr #16]
6 ldr r0, [r0, r0, lsl #0]
7 ldr r0, [r0, r0, lsl #16]
8 ldr r0, [r0, r0, asr #32]
9 ldr r0, [r0, r0, asr #16]
10 ldr r0, [r0, r0, rrx]
11 ldr r0, [r0, r0, ror #16]
13 @ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
[all …]
Dneont2-vld-encoding.s5 @ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
6 vld1.8 {d16}, [r0:64]
7 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
8 vld1.16 {d16}, [r0]
9 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
10 vld1.32 {d16}, [r0]
11 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
12 vld1.64 {d16}, [r0]
13 @ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
14 vld1.8 {d16, d17}, [r0:64]
[all …]
Dthumb_rewrites.s10 adds r0, r0, #8
11 @ CHECK: adds r0, #8 @ encoding: [0x08,0x30]
13 adds r0, r0, r0
14 @ CHECK: adds r0, r0, r0 @ encoding: [0x00,0x18]
16 add r0, r0, r8
17 @ CHECK: add r0, r8 @ encoding: [0x40,0x44]
22 add sp, sp, r0
23 @ CHECK: add sp, r0 @ encoding: [0x85,0x44]
38 add r0, r0, r1
39 @ CHECK: add r0, r1 @ encoding: [0x08,0x44]
[all …]
Dneont2-vst-encoding.s5 @ CHECK: vst1.8 {d16}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x07]
6 vst1.8 {d16}, [r0:64]
7 @ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x40,0xf9,0x4f,0x07]
8 vst1.16 {d16}, [r0]
9 @ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x40,0xf9,0x8f,0x07]
10 vst1.32 {d16}, [r0]
11 @ CHECK: vst1.64 {d16}, [r0] @ encoding: [0x40,0xf9,0xcf,0x07]
12 vst1.64 {d16}, [r0]
13 @ CHECK: vst1.8 {d16, d17}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x0a]
14 vst1.8 {d16, d17}, [r0:64]
[all …]
Dthumb2-dsp-diag.s4 sxtab r0, r0, r0
5 sxtah r0, r0, r0
6 sxtab16 r0, r0, r0
7 sxtb16 r0, r0
8 sxtb16 r0, r0, ror #8
14 @ CHECK-7EM: sxtab r0, r0, r0 @ encoding: [0x40,0xfa,0x80,0xf0]
15 @ CHECK-7EM: sxtah r0, r0, r0 @ encoding: [0x00,0xfa,0x80,0xf0]
16 @ CHECK-7EM: sxtab16 r0, r0, r0 @ encoding: [0x20,0xfa,0x80,0xf0]
17 @ CHECK-7EM: sxtb16 r0, r0 @ encoding: [0x2f,0xfa,0x80,0xf0]
18 @ CHECK-7EM: sxtb16 r0, r0, ror #8 @ encoding: [0x2f,0xfa,0x90,0xf0]
[all …]
Dthumb2-mclass.s13 mrs r0, apsr
14 mrs r0, iapsr
15 mrs r0, eapsr
16 mrs r0, xpsr
17 mrs r0, ipsr
18 mrs r0, epsr
19 mrs r0, iepsr
20 mrs r0, msp
21 mrs r0, psp
22 mrs r0, primask
[all …]
Dltorg.s15 ldr r0, =0x10002
16 @ CHECK: ldr r0, .Ltmp[[TMP0:[0-9+]]]
17 adds r0, r0, #1
18 adds r0, r0, #1
28 adds r0, r0, #1
29 adds r0, r0, #1
35 ldr r0, =0x10003
36 @ CHECK: ldr r0, .Ltmp[[TMP1:[0-9+]]]
37 adds r0, r0, #1
38 adds r0, r0, #1
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/arm/
Dtrampoline.S34 stmfd sp!, {r0-r3}
39 ldr r0, [pc, #-4092]
47 stmfd sp!, {r0-r3}
52 ldr r0, [pc, #-4092]
60 stmfd sp!, {r0-r3}
65 ldr r0, [pc, #-4092]
73 stmfd sp!, {r0-r3}
78 ldr r0, [pc, #-4092]
86 stmfd sp!, {r0-r3}
91 ldr r0, [pc, #-4092]
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-sp-operand-imm8-t32.cc95 {{{al, r0, sp, 0x0}, false, al, "al r0 sp 0x0", "al_r0_sp_0x0"},
96 {{al, r0, sp, 0x4}, false, al, "al r0 sp 0x4", "al_r0_sp_0x4"},
97 {{al, r0, sp, 0x8}, false, al, "al r0 sp 0x8", "al_r0_sp_0x8"},
98 {{al, r0, sp, 0xc}, false, al, "al r0 sp 0xc", "al_r0_sp_0xc"},
99 {{al, r0, sp, 0x10}, false, al, "al r0 sp 0x10", "al_r0_sp_0x10"},
100 {{al, r0, sp, 0x14}, false, al, "al r0 sp 0x14", "al_r0_sp_0x14"},
101 {{al, r0, sp, 0x18}, false, al, "al r0 sp 0x18", "al_r0_sp_0x18"},
102 {{al, r0, sp, 0x1c}, false, al, "al r0 sp 0x1c", "al_r0_sp_0x1c"},
103 {{al, r0, sp, 0x20}, false, al, "al r0 sp 0x20", "al_r0_sp_0x20"},
104 {{al, r0, sp, 0x24}, false, al, "al r0 sp 0x24", "al_r0_sp_0x24"},
[all …]
Dtest-disasm-a32.cc399 masm.Add(r0, r0, r1); in TEST_T32()
413 COMPARE_BOTH(Orn(r0, r1, 0), "mvn r0, #0\n"); in TEST()
414 COMPARE_BOTH(Orn(r0, r0, 0xffffffff), ""); in TEST()
420 COMPARE_A32(Orn(r0, r1, 1), in TEST()
424 COMPARE_A32(Orns(r0, r0, 1), in TEST()
429 COMPARE_BOTH(Orn(r0, r1, 0x00ffffff), "orr r0, r1, #0xff000000\n"); in TEST()
430 COMPARE_BOTH(Orn(r0, r1, 0xff00ffff), "orr r0, r1, #0xff0000\n"); in TEST()
431 COMPARE_BOTH(Orns(r0, r1, 0x00ffffff), "orrs r0, r1, #0xff000000\n"); in TEST()
433 COMPARE_A32(Orns(r0, r1, 0xabcd2345), in TEST()
438 COMPARE_T32(Orn(r0, r1, 0xabcd2345), in TEST()
[all …]
Dtest-simulator-cond-rdlow-operand-imm8-t32.cc211 const TestLoopData kTests[] = {{{eq, r0, 0},
216 {{ne, r0, 0},
221 {{cs, r0, 0},
226 {{cc, r0, 0},
231 {{mi, r0, 0},
236 {{pl, r0, 0},
241 {{vs, r0, 0},
246 {{vc, r0, 0},
251 {{hi, r0, 0},
256 {{ls, r0, 0},
[all …]
/external/swiftshader/third_party/subzero/tests_lit/assembler/arm32/
Ddiv-vec.ll61 ; ASM: udiv r0, r0, r1
62 ; ASM: udiv r0, r0, r1
63 ; ASM: udiv r0, r0, r1
64 ; ASM: udiv r0, r0, r1
84 ; ASM: uxth r0, r0
86 ; ASM: udiv r0, r0, r1
87 ; ASM: uxth r0, r0
89 ; ASM: udiv r0, r0, r1
90 ; ASM: uxth r0, r0
92 ; ASM: udiv r0, r0, r1
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dneont2-vld-encoding.s6 @ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf9]
7 vld1.8 {d16}, [r0, :64]
8 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf9]
9 vld1.16 {d16}, [r0]
10 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x60,0xf9]
11 vld1.32 {d16}, [r0]
12 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x60,0xf9]
13 vld1.64 {d16}, [r0]
14 @ CHECK: vld1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x60,0xf9]
15 vld1.8 {d16, d17}, [r0, :64]
[all …]
Dneon-vld-encoding.s4 vld1.8 {d16}, [r0, :64]
5 vld1.16 {d16}, [r0]
6 vld1.32 {d16}, [r0]
7 vld1.64 {d16}, [r0]
8 vld1.8 {d16, d17}, [r0, :64]
9 vld1.16 {d16, d17}, [r0, :128]
10 vld1.32 {d16, d17}, [r0]
11 vld1.64 {d16, d17}, [r0]
13 @ CHECK: vld1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x60,0xf4]
14 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x60,0xf4]
[all …]
Dneon-vst-encoding.s4 @ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf4]
5 vst1.8 {d16}, [r0, :64]
6 @ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf4]
7 vst1.16 {d16}, [r0]
8 @ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf4]
9 vst1.32 {d16}, [r0]
10 @ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf4]
11 vst1.64 {d16}, [r0]
12 @ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf4]
13 vst1.8 {d16, d17}, [r0, :64]
[all …]
Dneont2-vst-encoding.s6 @ CHECK: vst1.8 {d16}, [r0, :64] @ encoding: [0x1f,0x07,0x40,0xf9]
7 vst1.8 {d16}, [r0, :64]
8 @ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x4f,0x07,0x40,0xf9]
9 vst1.16 {d16}, [r0]
10 @ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x8f,0x07,0x40,0xf9]
11 vst1.32 {d16}, [r0]
12 @ CHECK: vst1.64 {d16}, [r0] @ encoding: [0xcf,0x07,0x40,0xf9]
13 vst1.64 {d16}, [r0]
14 @ CHECK: vst1.8 {d16, d17}, [r0, :64] @ encoding: [0x1f,0x0a,0x40,0xf9]
15 vst1.8 {d16, d17}, [r0, :64]
[all …]
Dthumb2-mclass.s12 mrs r0, apsr
13 mrs r0, iapsr
14 mrs r0, eapsr
15 mrs r0, xpsr
16 mrs r0, ipsr
17 mrs r0, epsr
18 mrs r0, iepsr
19 mrs r0, msp
20 mrs r0, psp
21 mrs r0, primask
[all …]
/external/swiftshader/third_party/LLVM/test/MC/MBlaze/
Dmblaze_imm.s17 addi r0, r0, 0x00000000
22 addi r0, r0, 0x00000001
27 addi r0, r0, 0x00000002
32 addi r0, r0, 0x00000004
37 addi r0, r0, 0x00000008
42 addi r0, r0, 0x00000010
47 addi r0, r0, 0x00000020
52 addi r0, r0, 0x00000040
57 addi r0, r0, 0x00000080
62 addi r0, r0, 0x00000100
[all …]
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/MBlaze/
Dmblaze_imm.txt7 # CHECK: addi r0, r0, 0
10 # CHECK: addi r0, r0, 1
13 # CHECK: addi r0, r0, 2
16 # CHECK: addi r0, r0, 4
19 # CHECK: addi r0, r0, 8
22 # CHECK: addi r0, r0, 16
25 # CHECK: addi r0, r0, 32
28 # CHECK: addi r0, r0, 64
31 # CHECK: addi r0, r0, 128
34 # CHECK: addi r0, r0, 256
[all …]

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