| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | idct16x16_msa.c | 16 v8i16 reg3, reg13, reg11, reg5, reg7, reg9, reg1, reg15; in vpx_idct16_1d_rows_msa() local
21 LD_SH8(input, 16, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa()
25 TRANSPOSE8x8_SH_SH(reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg8, in vpx_idct16_1d_rows_msa()
26 reg9, reg10, reg11, reg12, reg13, reg14, reg15); in vpx_idct16_1d_rows_msa()
41 DOTP_CONST_PAIR(reg9, reg7, cospi_14_64, cospi_18_64, loc2, loc3); in vpx_idct16_1d_rows_msa()
43 reg9 = reg1 - loc2; in vpx_idct16_1d_rows_msa()
65 DOTP_CONST_PAIR(reg7, reg9, cospi_24_64, cospi_8_64, reg7, reg9); in vpx_idct16_1d_rows_msa()
68 loc0 = reg9 + reg5; in vpx_idct16_1d_rows_msa()
69 reg5 = reg9 - reg5; in vpx_idct16_1d_rows_msa()
80 BUTTERFLY_4(reg8, reg10, reg11, reg5, loc0, reg4, reg9, loc1); in vpx_idct16_1d_rows_msa()
[all …]
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| /external/syslinux/gpxe/src/drivers/net/rtl818x/ |
| D | rtl8185_rtl8225.c | 723 u16 reg8, reg9; in rtl8225x_rf_init() local
734 reg9 = rtl8225_read(dev, 9); in rtl8225x_rf_init()
738 if (reg8 != 0x588 || reg9 != 0x700) { in rtl8225x_rf_init()
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| /external/elfutils/tests/ |
| D | run-addrcfi.sh | 42 integer reg9 (%eflags): undefined
89 integer reg9 (%eflags): undefined
141 integer reg9 (%r9): undefined
207 integer reg9 (%r9): undefined
311 integer reg9 (r9): undefined
1333 integer reg9 (r9): undefined
2361 integer reg9 (r9): undefined
3387 integer reg9 (%r9): same_value
3464 integer reg9 (%r9): same_value
3542 integer reg9 (r9): undefined
[all …]
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| /external/llvm/include/llvm/Support/ |
| D | Dwarf.def | 210 HANDLE_DW_OP(0x59, reg9)
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| /external/libyuv/files/source/ |
| D | row_msa.cc | 826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in ARGBToUVRow_MSA() local
901 reg9 = reg3 * const_0x4A; in ARGBToUVRow_MSA()
905 reg9 += reg5 * const_0x26; in ARGBToUVRow_MSA()
917 reg7 -= reg9; in ARGBToUVRow_MSA()
2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; in I444ToARGBRow_MSA() local
2694 reg9 = (v4i32)__msa_ilvl_h((v8i16)zero, (v8i16)vec1); in I444ToARGBRow_MSA()
2700 reg5 -= reg9 * vec_vr; in I444ToARGBRow_MSA()
2702 reg3 -= reg9 * vec_vg; in I444ToARGBRow_MSA()
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | big_alu.ll | 5 … x float> inreg %reg6, <4 x float> inreg %reg7, <4 x float> inreg %reg8, <4 x float> inreg %reg9) {
12 %tmp5 = extractelement <4 x float> %reg9, i32 0
17 %tmp10 = extractelement <4 x float> %reg9, i32 1
22 %tmp15 = extractelement <4 x float> %reg9, i32 2
27 %tmp20 = extractelement <4 x float> %reg9, i32 3
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| /external/elfutils/libdw/ |
| D | known-dwarf.h | 529 DWARF_ONE_KNOWN_DW_OP (reg9, DW_OP_reg9) \
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| /external/v8/src/ppc/ |
| D | macro-assembler-ppc.cc | 4262 Register reg9, Register reg10) { in AreAliased() argument
4265 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() + in AreAliased()
4277 if (reg9.is_valid()) regs |= reg9.bit(); in AreAliased()
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| D | macro-assembler-ppc.h | 70 Register reg8 = no_reg, Register reg9 = no_reg,
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| /external/v8/src/s390/ |
| D | macro-assembler-s390.cc | 5261 Register reg9, Register reg10) { in AreAliased() argument
5264 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() + in AreAliased()
5276 if (reg9.is_valid()) regs |= reg9.bit(); in AreAliased()
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| D | macro-assembler-s390.h | 76 Register reg8 = no_reg, Register reg9 = no_reg,
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 6401 Register reg9, Register reg10) { in AreAliased() argument
6404 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() + in AreAliased()
6416 if (reg9.is_valid()) regs |= reg9.bit(); in AreAliased()
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| D | macro-assembler-mips.h | 106 Register reg8 = no_reg, Register reg9 = no_reg,
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 6808 Register reg9, Register reg10) { in AreAliased() argument
6811 reg7.is_valid() + reg8.is_valid() + reg9.is_valid() + in AreAliased()
6823 if (reg9.is_valid()) regs |= reg9.bit(); in AreAliased()
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| D | macro-assembler-mips64.h | 112 Register reg8 = no_reg, Register reg9 = no_reg,
|