Searched refs:regValue (Results 1 – 7 of 7) sorted by relevance
119 ADDR_REGISTER_VALUE regValue = {0}; in radv_amdgpu_addr_create() local126 regValue.noOfBanks = amdinfo->mc_arb_ramcfg & 0x3; in radv_amdgpu_addr_create()127 regValue.gbAddrConfig = amdinfo->gb_addr_cfg; in radv_amdgpu_addr_create()128 regValue.noOfRanks = (amdinfo->mc_arb_ramcfg & 0x4) >> 2; in radv_amdgpu_addr_create()130 regValue.backendDisables = amdinfo->backend_disable[0]; in radv_amdgpu_addr_create()131 regValue.pTileConfig = amdinfo->gb_tile_mode; in radv_amdgpu_addr_create()132 regValue.noOfEntries = ARRAY_SIZE(amdinfo->gb_tile_mode); in radv_amdgpu_addr_create()134 regValue.pMacroTileConfig = NULL; in radv_amdgpu_addr_create()135 regValue.noOfMacroEntries = 0; in radv_amdgpu_addr_create()137 regValue.pMacroTileConfig = amdinfo->gb_macro_tile_mode; in radv_amdgpu_addr_create()[all …]
103 ADDR_REGISTER_VALUE regValue = {0}; in amdgpu_addr_create() local110 regValue.noOfBanks = ws->amdinfo.mc_arb_ramcfg & 0x3; in amdgpu_addr_create()111 regValue.gbAddrConfig = ws->amdinfo.gb_addr_cfg; in amdgpu_addr_create()112 regValue.noOfRanks = (ws->amdinfo.mc_arb_ramcfg & 0x4) >> 2; in amdgpu_addr_create()114 regValue.backendDisables = ws->amdinfo.backend_disable[0]; in amdgpu_addr_create()115 regValue.pTileConfig = ws->amdinfo.gb_tile_mode; in amdgpu_addr_create()116 regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode); in amdgpu_addr_create()118 regValue.pMacroTileConfig = NULL; in amdgpu_addr_create()119 regValue.noOfMacroEntries = 0; in amdgpu_addr_create()121 regValue.pMacroTileConfig = ws->amdinfo.gb_macro_tile_mode; in amdgpu_addr_create()[all …]
168 UINT_32 regValue, ADDR_TILECONFIG* pCfg) const;171 UINT_32 regValue, ADDR_TILEINFO* pCfg) const;
387 const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; in HwlInitGlobalParams()1231 UINT_32 regValue, ///< [in] GB_TILE_MODE register in ReadGbTileMode() argument1236 gbTileMode.val = regValue; in ReadGbTileMode()1376 UINT_32 regValue, ///< [in] GB_MACRO_TILE_MODE register in ReadGbMacroTileCfg() argument1381 gbTileMode.val = regValue; in ReadGbMacroTileCfg()
254 UINT_32 regValue, ADDR_TILECONFIG* pCfg) const;
1870 const ADDR_REGISTER_VALUE* pRegValue = &pCreateIn->regValue; in HwlInitGlobalParams()2525 UINT_32 regValue, ///< [in] GB_TILE_MODE register in ReadGbTileMode() argument2530 gbTileMode.val = regValue; in ReadGbTileMode()
319 ADDR_REGISTER_VALUE regValue; ///< Data from registers to setup AddrLib global data member