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Searched refs:reg_map (Results 1 – 10 of 10) sorted by relevance

/external/pcre/dist2/src/sljit/
DsljitNativeX86_32.c90 PUSH_REG(reg_map[TMP_REG1]); in sljit_emit_enter()
94 *inst++ = MOD_REG | (reg_map[TMP_REG1] << 3) | 0x4 /* esp */; in sljit_emit_enter()
98 PUSH_REG(reg_map[SLJIT_S2]); in sljit_emit_enter()
100 PUSH_REG(reg_map[SLJIT_S1]); in sljit_emit_enter()
102 PUSH_REG(reg_map[SLJIT_S0]); in sljit_emit_enter()
107 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | reg_map[SLJIT_R2]; in sljit_emit_enter()
111 *inst++ = MOD_REG | (reg_map[SLJIT_S1] << 3) | reg_map[SLJIT_R1]; in sljit_emit_enter()
115 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S2] << 3) | 0x4 /* esp */; in sljit_emit_enter()
122 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S0] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
127 *inst++ = MOD_DISP8 | (reg_map[SLJIT_S1] << 3) | reg_map[TMP_REG1]; in sljit_emit_enter()
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DsljitNativeTILEGX_64.c52 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
1163 FAIL_IF(ADDLI_SOLO(reg_map[dst_ar], ZERO, imm >> 48)); in emit_const_64()
1164 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 32)); in emit_const_64()
1165 FAIL_IF(SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm >> 16)); in emit_const_64()
1166 return SHL16INSLI_SOLO(reg_map[dst_ar], reg_map[dst_ar], imm); in emit_const_64()
1169 FAIL_IF(ADDLI(reg_map[dst_ar], ZERO, imm >> 48)); in emit_const_64()
1170 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 32)); in emit_const_64()
1171 FAIL_IF(SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm >> 16)); in emit_const_64()
1172 return SHL16INSLI(reg_map[dst_ar], reg_map[dst_ar], imm); in emit_const_64()
1209 FAIL_IF(ST_ADD(ADDR_TMP_mapped, reg_map[i], -8)); in sljit_emit_enter()
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DsljitNativeX86_64.c36 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B); in emit_load_imm64()
37 *inst++ = MOV_r_i32 + (reg_map[reg] & 0x7); in emit_load_imm64()
50 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_first); in generate_far_jump_code()
77 SLJIT_COMPILE_ASSERT(reg_map[TMP_REG3] == 9, tmp3_is_9_second); in generate_fixed_jump()
108 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
112 if (reg_map[i] >= 8) in sljit_emit_enter()
118 size = reg_map[i] >= 8 ? 2 : 1; in sljit_emit_enter()
122 if (reg_map[i] >= 8) in sljit_emit_enter()
138 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | 0x7 /* rdi */; in sljit_emit_enter()
154 *inst++ = MOD_REG | (reg_map[SLJIT_S0] << 3) | 0x1 /* rcx */; in sljit_emit_enter()
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DsljitNativeARM_32.c58 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
62 #define RM(rm) (reg_map[rm])
63 #define RD(rd) (reg_map[rd] << 12)
64 #define RN(rn) (reg_map[rn] << 16)
845 push |= 1 << reg_map[i]; in sljit_emit_enter()
848 push |= 1 << reg_map[i]; in sljit_emit_enter()
903 pop |= 1 << reg_map[i]; in sljit_emit_return()
906 pop |= 1 << reg_map[i]; in sljit_emit_return()
941 …ansfer_insts[(type) >> 4] | ((add) << 23) | ((wb) << 21) | (reg_map[target] << 12) | (reg_map[base…
981 …ags & SET_FLAGS, dst, SLJIT_UNUSED, (compiler->shift_imm << 7) | (opcode << 5) | reg_map[src2])); \
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DsljitNativeX86_common.c69 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 3] = { variable
92 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
101 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
701 return emit_do_imm(compiler, MOV_r_i32 + reg_map[dst], srcw); in emit_mov()
708 … return emit_do_imm32(compiler, (reg_map[dst] >= 8) ? REX_B : 0, MOV_r_i32 + reg_lmap[dst], srcw); in emit_mov()
778 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
779 && reg_map[SLJIT_R1] == 2 in sljit_emit_op0()
780 && reg_map[TMP_REG1] > 7, in sljit_emit_op0()
784 reg_map[SLJIT_R0] == 0 in sljit_emit_op0()
785 && reg_map[SLJIT_R1] < 7 in sljit_emit_op0()
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DsljitNativeARM_T2_32.c45 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
53 #define RD3(rd) (reg_map[rd])
54 #define RN3(rn) (reg_map[rn] << 3)
55 #define RM3(rm) (reg_map[rm] << 6)
56 #define RDN3(rdn) (reg_map[rdn] << 8)
62 ((reg_map[rn] << 3) | (reg_map[rd] & 0x7) | ((reg_map[rd] & 0x8) << 4))
64 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
66 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
69 #define RD4(rd) (reg_map[rd] << 8)
70 #define RN4(rn) (reg_map[rn] << 16)
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DsljitNativeSPARC_common.c98 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 6] = { variable
106 #define D(d) (reg_map[d] << 25)
108 #define S1(s1) (reg_map[s1] << 14)
109 #define S2(s2) (reg_map[s2])
116 #define DR(dr) (reg_map[dr])
924 return reg_map[reg]; in sljit_get_register_index()
DsljitNativeARM_64.c46 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 8] = { variable
51 #define RD(rd) (reg_map[rd])
52 #define RT(rt) (reg_map[rt])
53 #define RN(rn) (reg_map[rn] << 5)
54 #define RT2(rt2) (reg_map[rt2] << 10)
55 #define RM(rm) (reg_map[rm] << 16)
1518 return reg_map[reg]; in sljit_get_register_index()
DsljitNativePPC_common.c108 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 7] = { variable
115 #define D(d) (reg_map[d] << 21)
116 #define S(s) (reg_map[s] << 21)
117 #define A(a) (reg_map[a] << 16)
118 #define B(b) (reg_map[b] << 11)
119 #define C(c) (reg_map[c] << 6)
1666 return reg_map[reg]; in sljit_get_register_index()
DsljitNativeMIPS_common.c71 static const sljit_u8 reg_map[SLJIT_NUMBER_OF_REGISTERS + 5] = { variable
79 #define S(s) (reg_map[s] << 21)
80 #define T(t) (reg_map[t] << 16)
81 #define D(d) (reg_map[d] << 11)
92 #define DR(dr) (reg_map[dr])
1254 return reg_map[reg]; in sljit_get_register_index()